• 대한기계학회논문집A
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• 제20권7호
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• pp.2087-2096
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• 1996

Recentrly advantages in composite and light weight material techniques have led to the increased use of bonded dissimilar materials such as ceramics/metal bonded joints, IC package, brazing, coating and soldering in the various industries. It is required to analyze the evaluation method of fracture strength and design methodology of bonded joints in dissimilar materials. Stress singularity according to changes of scarf angles for bonded scarf joints in dissimilar materials was investigated by the boundary element method and static experiments. In this paper, effect of the stress singularity factors at the interface edges of scarf joints on various dissmilar materials combinations were investigated by analysis of its stress and stress singularity index using 2-dimensional elastic program of boundary element method. And the variations of stress singularity index by changes for Young's modulus ratios of materials and scarf angles were investigated. Also, it is found that stress singularities at bonded interface edges are disappeared for certain combination of scarf angle in a pair of bonded dissimilar materials. As the results, it is proposed that the strength evaluation by using stress singularity factors, $\Gamma$, considering stress singularity at the interface edges of bonded dissimilar materials, is very useful.

• 제어로봇시스템학회논문지
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• 제16권11호
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• pp.1089-1095
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• 2010

We propose an image segmentation method for auto-teaching system of PCB (Printed Circuit Board) assembly inspection machines. The inspection machine acquires images of all components in PCB, and then compares each image with its standard image to find the assembly errors such as misalignment, inverse polarity, and tombstone. The component window that is the area of component to be acquired by camera, is one of the teaching data for operating the inspection machines. To reduce the teaching time of the machine, we newly develop the image processing method to extract the component window automatically from the image of PCB. The proposed method segments the component window by excluding the soldering parts as well as board background. We binarize the input image by use of HSI color model because it is difficult to discriminate the RGB colors between components and backgrounds. The linear combination of the binarized images then enhances the component window from the background. By use of the horizontal and vertical projection of histogram, we finally obtain the component widow. The experimental results are presented to verify the usefulness of the proposed method.

• Journal of Welding and Joining
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• 제16권6호
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• pp.77-85
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• 1998

Effects of non-cleaning and cleaning fluxes on the wetting properties and defects at flow soldered joints were investigated. Non-cleaning flux (R-type of 3.3% solid content) and cleaning flux (RMA-type of 15% solid content) were used. Wetting test was accomplished by wetting balance method with changing surface state of wetting specimen, CU. Sn-37%Pb solder was used for wetting test and flow soldering. As experimental results, the wetting time for vertical force from the surface tension being zero was mainly affected by surface state of the wetting specimen. Non-cleaning flux had a good wettability compared with cleaning flux. In case of non-cleaning flux, conveyor speed had a great affection to defects of bridge, icicle, and poor solder.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2006년 추계학술발표대회 개요집
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• pp.181-183
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• 2006

This paper studies the mechanical behaviors of Sn-3.5Ag solder joint against substrate(such as Au/Ni/Cu, Au/cu, Ni/Cu and Cu pad) after induction heating, a new soldering method. It was found that the solder bump formation depends on the time and current of the induction heating system. Also the heating value of the solder bump were found to vary with respect to the thermal conductivity of the pads on the substrate. In case of Au/Ni/Cu pad and Au/Cu pad, solder bump's shear strength were high for the heating time of $1.5{\sim}2sec$. For Ni/Cu pad, solder bump's shear strength were found to increase with time increment.

• Journal of Welding and Joining
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• 제18권6호
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• pp.74-82
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• 2000

The fluxless wetting properties of UBM-coated Si-wafer to the binary lead-free solders(Sn-Ag, Sn-Sb, Sjn-In, Sn0Bi) were estimated by wetting balance method. With the new wettability indices from the wetting curves of one side coated specimen, the wetting property estimation of UBM-coated Si-wafer was possible. For UBM of Si-chip, Au/Cu/Cr UBm was better than au/Ni/TI in the point of wetting time/ At general reflow process temperature, the wettability of high melting point solders(Sn-Sb, Sn-Ag) was better than that of low melting point one(Sn-Bi, Sn-In). The contact angle of the one side coated Si-plate to the solder could be calculated from the force balance equation by measuring the static state force and the tilt angle.

• 한국해양공학회지
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• 제14권4호
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• pp.79-85
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• 2000

Press-fit pin connection is the solderless interference-fit between pins and plated through holes(PTH) in the printed curcuit board(PCB). Because of not only its simple assembly and absence of problems associated with soldering, but also its good mechanical and electrical characteristics, the press-fit pin connection technology has quickly gained wide acceptance in the telecommunications and computer industries. In this paper, the contact stress characteristics of the domestic CPF pin when inserted into the friction coefficients were compared and the stress variations of the compliant part of the pin, which have an influence on the performance, were displayed with the time and arc length after complete connected. It is supposed that the results will provide useful data to improve the performance of the pin-PCB interconnection mechanism.

• 마이크로전자및패키징학회지
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• 제31권2호
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• pp.69-77
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• 2024

최근 전자기기의 소형화, 다기능화 등으로 인한 전자부품 실장 영역의 한계치를 극복하고 플라스틱 사출물에 직접 회로를 인쇄하고 소자 및 부품을 실장하는 molded interconnect device (MID) 형태의 패키징 기법이 도입되고 있다. 다만 열 안정성이 낮은 플라스틱 사출물을 사용하는 경우, 종래의 리플로우 공정을 통한 부품 실장에 어려움이 있다. 본 연구에서는 특정 부위 혹은 소재만을 가열할 수 있는 유도가열 현상을 이용하여 플라스틱에 어떠한 열 데미지 없이 솔더를 용융시켜 실장하는 공정을 개발하였다. 가열하고자 하는 부위에 자속을 집중시킬 수 있는 유도가열용 Cu 코일 형상을 설계하고, 유한요소해석을 통해 패드부 자속 집중 및 가열 정도를 검증하였다. Polycarbonate 기판 위에 실장공정 검증을 위한 LED, capacitor, resistor, connector를 각각 유도가열을 통해 실장하고 작동여부를 확인하였다. 본 연구를 통해 리플로우 공법의 한계를 극복가능한 자기유도를 통한 선택적 가열 공정의 적용 가능성을 제시하였다.

• 문화기술의 융합
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• 제4권3호
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• pp.209-212
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• 2018

이방성 도전필름(ACF)을 사용한 본딩은 납땜이 용이하지 않은 이질적인 소재 간 미세 접합을 형성하는데 널리 사용되어진다. 성공적인 ACF 본딩 구현을 위한 3가지 제한조건이 존재한다. 본딩 접촉점은 설정된 작업 시간동안 적절한 압력과 온도를 유지한 헤드에 의해서 압착되어야 한다. 본 논문에서는 머신 비전을 기반으로 한 ACF 본딩기법을 제안하고 실험을 통해 검증한다. 시스템은 본딩 작업대 상의 PCB 위치 및 방향을 계산하고 헤드가 압착되어야 하는 최적의 접촉점을 결정한다. 제안한 시스템이 접촉면 상의 헤드 평탄도를 보장함으로써 접착력을 향상시킬 수 있음을 실험결과를 통해 보여준다.

• 한국전기전자재료학회논문지
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• 제19권4호
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• pp.398-403
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• 2006

This paper describes the evaluation of the long duration current impulse withstand characteristics of ZnO blocks for high voltage surge arresters. Four ZnO varistors were manufactured with the general ceramic production method and the long duration current impulse withstand test, electrical uniformity evaluation test and microstructure observation were performed. All varistors exhibited high density, which was in the range of $5.42{\sim}5.46g/cm^3$. In the electrical properties, the reference voltage of samples was in the range of $5.11{\sim}5.25\;kV$ and the residual voltage was in the range of $8.314{\sim}8.523\;kV$. In the long duration current impulse withstand test, sample No.2 and No.3 failed at the 2nd and 4th shot of series impulse currents, respectively, but the rest survived 18 shots during the test. Before and after this test, the variation ratio of the residual voltage of samples survived was below 0.5 %, which was in the acceptance range of 5 %. According to the results of the test, it is thought that if the soldering method is improved, ZnO varistors would be possible to apply to the high voltage arresters like the station class and transmission line arresters in the near future.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.205-208
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• 2001

Steady state and transient thermal analysis has been done by a finite element method in a diode of 12kV blocking voltage for microwave oven. The diode was fabricated by soldering ten pieces of 1200V diodes in series, capping a dummy wafer at the far end of diode series, and finally copper wire bonded for building anode and cathode terminal. In order to achieve high voltage and reliability, the edge of each diode was beveled and passivated by resin and epoxy with a thickness of $25{\mu}m$ and $3700{\mu}m$, respectively. The chip size, thickness and material properties were very important factor for high voltage diode package. And also, thermal stress value was highest in the edge of diode and solder. So, design of edge in silicon was very important to thermal stress.