• Journal of the Korean Solar Energy Society
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• v.34 no.4
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• pp.45-50
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• 2014

In this paper, the Ocean Thermal Energy Conversion(OTEC) with vapor-vapor ejector is proposed newly. At this OTEC system, a vapor-vapor ejector is installed at inlet of condenser. The vapor-vapor ejector plays a very important role in increasing of the production work of low-stage turbine throughout the decrement of outlet pressure of ejector. The performance analysis is conducted for optimizing the system with HYSYS program. The procedure of performance analysis consists of outlet pressure of high turbine, the mass ratio of working fluid at separator, total working fluid rate, and nozzle diameters of vapor-vapor ejector. The main results is summarized as follows. The nozzle diameter is most important thing in this study. When each nozzle diameter of vapor-vapor ejector is 10 mm, the efficiency of OTEC system with vapor-vapor ejector shows the highest value. So it is necessary to set the optimized nozzle diameters of vapor-vapor ejector for achieving the high efficiency OTEC power system.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.478.1-478.1
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• 2014

We investigated $MoO_3$ graded ITO electrodes for organic solar cells (OSCs) without PEDOT:PSS buffer layer. The effect of $MoO_3$ thickness on the electrical, optical, and structural properties of $MoO_3$ graded ITO anodes prepared by RF/DC magnetron co-sputtering system using $MoO_3$ and ITO targets was investigated. At optimized conditions, we obtained $MoO_3$ graded ITO electrodes with a low sheet resistance of 13 Ohm/square, a high optical transmittance of 83% and a work function of 4.92 eV, comparable to conventional ITO films. Due to the existence of $MoO_3$ on the ITO electrodes, OSCs fabricated on $MoO_3$ graded ITO electrode without buffer layer successfully operated. Although OSCs fabricated on ITO anode without buffer layer showed a low power conversion efficiency of 1.249%, OSCs fabricated on $MoO_3$ graded ITO electrode without buffer layer showed a outstanding cell performance of 2.545%. OSCs fabricated on the $MoO_3$ graded ITO electrodes exhibited a fill factor of 61.275%, a short circuit current of 7.439 mA/cm2, an open circuit voltage of 0.554 V, and a power conversion efficiency of 2.545%. Therefore, $MoO_3$ graded ITO electrodes can be considered a promising transparent electrode for cost efficient and reliable OSCs because it could eliminate the use of acidic PEDOT:PSS buffer layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.217-217
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• 2012

Solution-processed tungsten oxide thin film with thickness of about 30 nm is prepared from ammonium tungstate. This layer is introduced into the interface between the poly(3-hexylthiophene):[6,6]-phenyl-C61-butyric acid methyl ester (P3HT:PCBM) layer and the ITO electrode to be used as an electron blocking layer. The annealed tungsten oxide thin films at $150^{\circ}C$ and $300^{\circ}C$ show amorphous phase, while the $400^{\circ}C$ -annealed tungsten oxide film shows crystalline phase. At $150^{\circ}C$ annealing temperature, the conversion efficiency is significantly improved from 0.71% to 1.42% as the condition is changed from vacuum to air atmosphere, which is related to oxidation state of tungsten in amorphous phase. For the air annealing condition, the conversion efficiency is further increased from 1.42% to 2.01% as the temperature is increased from $150^{\circ}C$ to $300^{\circ}C$, which is mainly due to the removal of the chemisorbed water. However, a slight deterioration in photovoltaic performance is observed when the temperature is increased to $400^{\circ}C$, which is ascribed to poor electron blocking ability due to the formation of crystalline phase. It is concluded that $W^{6+}$ oxidation state and amorphous nature in tungsten oxide interlayer is essential for blocking electron effectively from the active layer to the ITO electrode.

• Journal of the Korean Ceramic Society
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• v.51 no.4
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• pp.362-366
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• 2014

Dye-sensitized solar cells (DSSCs) were synthesized using a $0.25cm^2$ area of a $TiO_2$ nanoparticle layer as the electrode and platinum (Pt) as the counter electrode. The $TiO_2$ nanoparticle layers (12 to 22 ${\mu}m$) were screen-printed on fluorine-doped tin oxide glass. Glancing angle X-ray diffraction results indicated that the $TiO_2$ layer is composed of pure anatase with no traces of rutile $TiO_2$. The Pt counter electrode and the ruthenium dye anchored $TiO_2$ electrode were then assembled. The best photovoltaic performance of DSSC, which consists of a $18{\mu}m$ thick $TiO_2$ nanoparticle layer, was observed at a short circuit current density ($J_{sc}$) of $14.68mA{\cdot}cm^{-2}$, an open circuit voltage ($V_{oc}$) of 0.72V, a fill factor (FF) of 63.0%, and an energy conversion efficiency (${\eta}$) of 6.65%. It can be concluded that the electrode thickness is attributed to the energy conversion efficiency of DSSCs.

• Korean Journal of Materials Research
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• v.19 no.1
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• pp.50-53
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• 2009

Multi-walled carbon nanotubes (MWNTs) were synthesized on different substrates (bare Si and $SiO_2$/Si substrate) to investigate dye-sensitized solar cell (DSSC) applications as counter electrode materials. The synthesis of MWNTs samples used identical conditions of a Fe catalyst created by thermal chemical vapor deposition at $900^{\circ}C$. It was found that the diameter of the MWNTs on the Si substrate sample is approximately $5{\sim}10nm$ larger than that of a $SiO_2$/Si substrate sample. Moreover, MWNTs on a Si substrate sample were well-crystallized in terms of their Raman spectrum. In addition, the MWNTs on Si substrate sample show an enhanced redox reaction, as observed through a smaller interface resistance and faster reaction rates in the EIS spectrum. The results show that DSSCs with a MWNT counter electrode on a bare Si substrate sample demonstrate energy conversion efficiency in excess of 1.4 %.

• Journal of the Korean Society for Precision Engineering
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• v.31 no.11
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• pp.993-998
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• 2014

Silver (Ag) grid patterned PET substrates were manufactured by thermal roll-imprinting methods. We coated highly conductive layer (HCL) as a supply electrode on the Ag grid patterned PET in the three kinds of conditions. One was no-HCL without conductive PEDOT:PSS on the Ag grid patterned PET substrate, another was thin-HCL coated with ~50 nm thickness of conductive PEDOT:PSS on the Ag grid PET, and the other was thick-HCL coated with ~95 nm thickness of conductive PEDOT:PSS. These three HCLs in order showed 73.8%, 71.9%, and 64.7% each in transmittance, while indicating $3.84{\Omega}/{\Box}$, $3.29{\Omega}/{\Box}$, and $2.65{\Omega}/{\Box}$ each in sheet resistance. Fabrication of organic solar cells (OSCs) with HCL Ag grid patterned PET substrates showed high power conversion efficiency (PCE) on the thin-HCL device. The thick-HCL device decreased efficiency due to low open circuit voltage ($V_{OC}$). And the Ag grid pattern device without HCL had the lowest energy efficiency caused by quite low short current density ($J_{SC}$).

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.308-309
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• 2016

Reducing surface recombination is a critical factor for high efficiency silicon solar cells. The passivation process is for reducing dangling bonds which are carrier. Tunnel oxide layer is one of main issues to achieve a good passivation between silicon wafer and emitter layer. Many research use wet-chemical oxidation or thermally grown which the highest conversion efficiencies have been reported so far. In this study, we deposit ultra-thin tunnel oxide layer by PECVD (Plasma Enhanced Chemical Vapor Deposition) using $N_2O$ plasma. Both side deposit tunnel oxide layer in different RF-power and phosphorus doped a-Si:H layer. After deposit, samples are annealed at $850^{\circ}C$ for 1 hour in $N_2$ gas atmosphere. After annealing, samples are measured lifetime and implied Voc (iVoc) by QSSPC (Quasi-Steady-State Photo Conductance). After measure, samples are annealed at $400^{\circ}C$ for 30 minute in $Ar/H_2$ gas atmosphere and then measure again lifetime and implied VOC. The lifetime is increase after all process also implied VOC. The highest results are lifetime $762{\mu}s$, implied Voc 733 mV at RF-power 200 W. The results of C-V measurement shows that Dit is increase when RF-power increase. Using this optimized tunnel oxide layer is attributed to increase iVoc. As a consequence, the cell efficiency is increased such as tunnel mechanism based solar cell application.

• Current Photovoltaic Research
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• v.3 no.2
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• pp.39-44
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• 2015

$Cu(In,Ga)_3Se_5$ (${\beta}-CIGS$) has a band gap of 1.35 eV which is an optimum value for high solar-energy conversion efficiency. However, ${\beta}-CIGS$ film was not well characterized yet due to lower efficiency compared to $Cu(In,Ga)Se_2$ (${\alpha}-CIGS$). In this work, ${\beta}-CIGS$ films were fabricated by a three-stage co-evaporation of elemental sources with various Se fluxes. As the Se flux increased, the crystallinity of ${\beta}-CIGS$ phase was improved from the analysis of Raman spectroscopy and a deep-level defect was reduced from the analysis of photoluminescence spectroscopy. A Se treatment of the ${\beta}-CIGS$ film at $200^{\circ}C$ increased Ga content and decreased Cu content at the surface of the film. With the Se treatment at $200^{\circ}C$, the cell efficiency was greatly improved for the CIGS films prepared with low Se flux due to the increase of short-circuit current and fill factor. It was found that the main reason of performance improvement was lower Cu content at the surface instead of higher Ga content.

• Journal of the Korean Institute of Telematics and Electronics
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• v.22 no.4
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• pp.92-100
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• 1985

New N+N/P HLE solar cells with N+ surface charge accumulated layer in the emitter region are fabricated on the N/P Si epiwafer by incorporating high fixed positive charge density (Qss) at the Si-AR layer interface. Solar cells are classified into two categories, i.e, OCI and NCI Cell depending on AR layer, SiOl and Si3 N4/sioxynitride layer respectively. The distribution of Qss in the Si-AR layer interface is examined by C-V plot. It shows that the surface charge accumulated layer is formed more effectively in the NCI cell (Qss=1.79-1.84$\times$1012cm-2) than in the OCI cell (Qss=3.03~4.40$\times$1011 cm-2). The efficiency characteristics are evaluated under the JCR halogen lamp of 100 mw/cm2. The average (maximum) conversion efficiency for active area is 15.18 (15.46)% in the OCI cell and 16.31 (17.07)% in the NCI cell.

• Proceedings of the KIEE Conference
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• 1994.07b
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• pp.1277-1279
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• 1994

In the structure of ZnO/nip-SiC: H/metal substrate amorphous silicon (a-Si:H) solar cells, the effects of inserting a rear textured ZnO in the p-SiC:H/metal interface and a graded bandgap buffer layer in the i/p-SiC:H have been analysed by computer simulation. The incident light was taken to have an intensity of $100mW/cm^2$(AM-1). The thickness of the a-Si:H n, ${\delta}$-doped a-SiC:H p, and buffer layers was assumed to be $200{\AA},\;66{\AA}$, and $80{\AA}$, respectively. The scattering coefficients of the front and back ZnO were taken to be 0.2 and 0.7, respectively. Inserting the rear buffer layer significantly increases the open circuit voltage($V_{oc}$) due to reduction of the i/p interface recombination rate. The use of textured ZnO markedly improves collection efficiency in the long wavelengths( above ${\sim}550nm$ ) by back scattering and light confinement effects, resulting in dramatic enhancement of the short circuit current density($J_{sc}$). By using the rear buffer and textured ZnO, the i-layer thickness of the ceil for obtaining the maximum efficiency becomes thinner(${\sim}2500{\AA}$). From these results, it is concluded that the use of textured ZnO and buffer layer at the backside of the ceil is very effective for enhancing the conversion efficiency and reducing the degradation of a-Si:H pin-type solar cells.