• ETRI Journal
• /
• v.25 no.5
• /
• pp.328-336
• /
• 2003

Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

• ETRI Journal
• /
• v.22 no.1
• /
• pp.20-29
• /
• 2000

In this paper, we present a design of video and audio single chip encoder/decoder for portable multimedia application. The single-chip called as video audio signal processor (VASP) consists of a video signal processing block and an audio single processing block. This chip has mixed hardware/software architecture to combine performance and flexibility. We designed the chip by partitioning between video and audio block. The video signal processing block was designed to implement hardware solution of pixel input/output, full pixel motion estimation, half pixel motion estimation, discrete cosine transform, quantization, run length coding, host interface, and 16 bits RISC type internal controller. The audio signal processing block is implemented with software solution using a 16 bits fixed point DSP. This chip contains 142,300 gates, 22 Kbits FIFO, 107 kbits SRAM, and 556 kbits ROM, and the chip size is $9.02mm{\times}9.06mm$ which is fabricated using 0.5 micron 3-layer metal CMOS technology.

• Journal of Korea Multimedia Society
• /
• v.18 no.12
• /
• pp.1501-1508
• /
• 2015

In this paper, we describe a case study to improve performance through the load testing of multi-tired system for financial accounts before the system opening. The load test was conducted after the data collection tools(Performance Monitor, DB PSSDiag) were installed. By analyzing the collected log, we were able to identify the main sector requiring performance improvements among the presentation tier, web tier, business logic tier and data tier. The ASP.NET server-down on the web tier could be improved by modifying the parameter values in the configuration file. Some server downs occurred on the business logic tier when a large number of users access at the same time, were more difficult to be solved. By analyzing the hang-dump at the server-down time, we were able to find a process that caused the problem. and we had to modify the relevant codes. For major performance improvements of the data-tier, indices of some queries was optimized by using the built-in DBMS query analyzer, after analyzing the log of long-response-time queries. The problems and solutions considered in this case study will be a reference for the performance improvement of a multi-layer system with the similar structure.

• Journal of KIISE:Computer Systems and Theory
• /
• v.30 no.7_8
• /
• pp.331-340
• /
• 2003

Low-cost commodity SMP(Symmetric Multiprocessor) is widely used as a node of cluster system. In this paper, we implement and evaluate the performance of SDSM system for SMP clusters. Our SDSM system provides HLRC(Home-based Lazy Release Consistency) memory consistency model. Our protocol utilize shared memory within same SMP node, so that page fetch and message passing through network can be reduced. It is implemented on 8 node of 2-way Pentium-III SMP interconnected with 100Mbps Fast Ethernet, and uses TCP/IP for transport/network layer protocol. The experiment with eight applications shows that our SMP protocol achieves maximum 33% speedup improvement and 13%-52% reduction of page fetch compared with uniprocessor protocol.

• Journal of KIISE:Computing Practices and Letters
• /
• v.11 no.6
• /
• pp.477-487
• /
• 2005

As embedded system grows in size and complexity, the importance of the technique for dynamic memory allocation has increased. The objective of this paper is to measure the performance of dynamic memory allocation by varying both hardware and software design parameters for embedded systems. Unlike torrent performance evaluation studies that have presumed the single threaded system with single address spate without OS support, our study adopts realistic environment where the embedded system runs on Linux OS. This paper contains the experimental performance analyses of dynamic memory allocation method by investigating the effects of each software layer and some hardware design parameters. Our quantitative results tan be used to help system designers design high performance, low power embedded systems.

• Earthquakes and Structures
• /
• v.3 no.3_4
• /
• pp.549-561
• /
• 2012

Many building foundations are embedded, however it is not easy to compact the backfill around the foundation especially for the deeply embedded ones. The soil condition around the embedded foundation may affect the seismic response of a building due to the weak contact between the soil and the foundation. In this paper, the response accelerations in the short-period range and at the period of 1 second (in the long-period range) for a seismic design spectrum specified in the IBC design code were compared considering perfect and poor backfills to investigate the effect of backfill compaction around the embedded foundation. An in-house finite-element software (P3DASS) which has the capability of horizontal pseudo-3D seismic analysis with linear soil layers was used to perform the seismic analyses of the structure-soil system with an embedded foundation. Seismic analyses were carried out with 7 bedrock earthquake records provided by the Pacific Earthquake Engineering Research Center (PEER), scaling the peak ground accelerations to 0.1 g. The results indicate that the poor backfill is not detrimental to the seismic response of a building, if the foundation is not embedded deeply in the soft soil. However, it is necessary to perform the seismic analysis for the structure-soil system embedded deeply in the soft soil to check the seismic resonance due to the soft soil layer beneath the foundation, and to compact the backfill as well as possible.

• Journal of Information Processing Systems
• /
• v.17 no.4
• /
• pp.754-771
• /
• 2021

In the task of continuous dimension emotion recognition, the parts that highlight the emotional expression are not the same in each mode, and the influences of different modes on the emotional state is also different. Therefore, this paper studies the fusion of the two most important modes in emotional recognition (voice and visual expression), and proposes a two-mode dual-modal emotion recognition method combined with the attention mechanism of the improved AlexNet network. After a simple preprocessing of the audio signal and the video signal, respectively, the first step is to use the prior knowledge to realize the extraction of audio characteristics. Then, facial expression features are extracted by the improved AlexNet network. Finally, the multimodal attention mechanism is used to fuse facial expression features and audio features, and the improved loss function is used to optimize the modal missing problem, so as to improve the robustness of the model and the performance of emotion recognition. The experimental results show that the concordance coefficient of the proposed model in the two dimensions of arousal and valence (concordance correlation coefficient) were 0.729 and 0.718, respectively, which are superior to several comparative algorithms.

• Structural Monitoring and Maintenance
• /
• v.6 no.1
• /
• pp.47-66
• /
• 2019

One method of retrofitting concrete structures is to use fiber reinforced polymers (FRP). In this research, the shear, torsional and flexural strengthening of self-compacting reinforced concrete (RC) girders are fulfilled with glass fiber reinforced polymer (GFRP) and carbon fiber reinforced polymer (CFRP) materials. At first, for verification, the experimental results were compared with numerical modeling results obtained from ABAQUS software version 6.10. Then the reinforcing sheets were attached to concrete girders in one and two layers. Studying numerical results obtained from ABAQUS software showed that the girders stiffness decreased with the propagations of cracks in them, and then the extra stresses were tolerated by adhesive layers and GFRP and CFRP sheets, which resulted in increasing the bearing capacity of the studied girders. In fact, shear, torsion and bending strengths of the girders increased by reinforcing girders with adding GFRP and CFRP sheets. The samples including two layers of CFRP had the maximum efficiencies that were 90, 76 and 60 percent of improvement in shear, torsion and bending strengths, respectively. It is worth noting that the bearing capacity of concrete girders with adding one layer of CFRP was slightly higher than the ones having two layers of GFRP in all circumstances; therefore, despite the lower initial cost of GFRP, using CFRP can be more economical in some conditions.

• Advances in Computational Design
• /
• v.4 no.2
• /
• pp.141-153
• /
• 2019

This research is comprised of virtually simulating behavior while experiencing low gravity effects in advance of real world testing in low gravity aboard Zero Gravity Corporation's (Zero-G) research aircraft (727-200F). The experiment simulated a drill rig penetrating a regolith simulant. Regolith is a layer of loose, heterogeneous superficial deposits covering solid rock on surfaces of the Earth' moon, asteroids and Mars. The behavior and propagation of space debris when drilled in low gravity was tested through simulations and visualization in a leading dynamic simulation software as well as discrete element modeling software and in preparation for comparing to real world results from flying the experiment aboard Zero-G. The study of outer space regolith could lead to deeper scientific knowledge of extra-terrestrial surfaces, which could lead us to breakthroughs with respect to space mining or in-situ resource utilization (ISRU). These studies aimed to test and evaluate the drilling process in low to zero gravity environments and to determine static stress analysis on the drill when tested in low gravity environments. These tests and simulations were conducted by a team from Texas A&M University's Department of Construction Science, the United States Air Force Academy's Department of Astronautical Engineering, and Crow Industries

• Journal of The Korean Astronomical Society
• /
• v.48 no.2
• /
• pp.125-137
• /
• 2015

We report results of the performance evaluation of a new hardware correlator in Korea, the Daejeon correlator, developed by the Korea Astronomy and Space Science Institute (KASI) and the National Astronomical Observatory of Japan (NAOJ). We conduct Very Long Baseline Interferometry (VLBI) observations at 22 GHz with the Korean VLBI Network (KVN) in Korea and the VLBI Exploration of Radio Astrometry (VERA) in Japan, and correlated the aquired data with the Daejeon correlator. For evaluating the performance of the new hardware correlator, we compare the correlation outputs from the Daejeon correlator for KVN observations with those from a software correlator, the Distributed FX (DiFX). We investigate the correlated flux densities and brightness distributions of extragalactic compact radio sources. The comparison of the two correlator outputs shows that they are consistent with each other within < 8%, which is comparable with the amplitude calibration uncertainties of KVN observations at 22 GHz. We also find that the 8% difference in flux density is caused mainly by (a) the difference in the way of fringe phase tracking between the DiFX software correlator and the Daejeon hardware correlator, and (b) an unusual pattern (a double-layer pattern) of the amplitude correlation output from the Daejeon correlator. The visibility amplitude loss by the double-layer pattern is as small as 3%. We conclude that the new hardware correlator produces reasonable correlation outputs for continuum observations, which are consistent with the outputs from the DiFX software correlator.