• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2005년도 추계학술발표대회 개요집
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• pp.231-233
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• 2005

Laser have been utilized as a heat source for the soldering of electronic components for the their capability of localized heating and faster heating rate. Laser soldering process, especially the diode laser soldering of BGA solderball was investigated. In this study, an attempt was made to investigate the possibility of laser soldering using Sn-37Pb and Sn-3Ag-0.5Cu solderball. The laser energy absorbed on the pad raised the temperature of the solderball forming a reflowed solder bump. The result were discussed based on the measurement of pull and shear strength of the bond.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2007년 추계학술발표대회 개요집
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• pp.245-247
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• 2007

Sn-base solder bump is mainly used in micro-joining for flip chip package. The quantity of intermetallic compounds that was formed between Cu pad and solder interface importantly affects reliability. In this research, micro-bump was fabricated by two binary electroplating and the intermetallic compounds(IMCs) was estimated quantitatively. When the micro Sn-Ag solder bump was made by electroplating, SiC powder was added in the plating solution for protecting of intermetallic growth. Then, the intermetallic compounds growth was decrease with increase of amount of SiC power. However, if the mount of SiC particle exceeds 4 g/L, the effect of the growth restraint decrease rapidly.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집
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• pp.332-336
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• 2001

In this study, the reaction at UBM(Under Bump Metallurgy) and solder interface was investigated. The UBM employed in conventional optical packages, Au/Pt/Ti layer, were found to dissolve into molten Au-Sn eutectic solder during reflow soldering. Therefore, the reaction with different diffusion barrier layer such as Fe, Co, Ni were investigated to replace the conventional R layer. The reaction behavior was investigated by reflowing the solder on the pad of the metals defined by Cr layer for 1, 2, 3, 4, and 5 minutes at 330$^{\circ}C$. Among the metals, Co was found to be most suitable for the diffusion barrier layer as the wettability with the solder was reasonable and the reaction rate of intermetallic formation at the interface is relatively slow.

• Journal of Welding and Joining
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• 제19권3호
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• pp.311-316
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• 2001

This paper presents that the affecting factors to the solderability and initial reliability. It is the factor that the coefficient of thermal expansion between package and PCB(Printed Circuit Board), the quantity of solder paste and reflow condition, and Au thickness of the solder ball pad on polyimide tape. As the reflow soldering condition for 48 ${\mu}BGA$ is changed, it is estimated that the quantity of Au diffusion at eutectic Sn-Pb solder surface and initial bonding strength of eutectic Sn-Pb solder and lead free solder. It is the result that quantitative measurement of Au diffusion quantity is difficult, but the shear strength of eutectic Sn-Pb solder joint is 842 mN at first reflow and increases 879 mN at third reflow. The major failure mode in solder is judged solder fracture. So, Au diffusion quantity is more affected by reflow temperature than by the reflow times.

• Journal of Welding and Joining
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• 제29권5호
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• pp.95-98
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• 2011

Recently, there is a growing tendency that fine-pitch electronic devices are increased due to higher density and very large scale integration. Finer pitch printed circuit board(PCB) is to be decrease insulation resistance between circuit patterns and electrical components, which will induce to electrical short in electronic circuit by electrochemical migration when it exposes to long term in high temperature and high humidity. In this research, the effect of soldering flux acting as an electrical carrier between conductors on electrochemical migration was investigated. The PCB pad was coated with OSP finish. Sn3.0Ag0.5Cu solder paste was printed on the PCB circuit and then the coupon was treated by reflow process. Thereby, specimen for ion migration test was fabricated. Electrochemical migration test was conducted under the condition of DC 48 V, $85^{\circ}C$, and 85 % relative humidity. Their life time could be increased about 22% by means of removal of flux. The fundamentals and mechanism of electrochemical migration was discussed depending on the existence of flux residues after reflow process.

• 마이크로전자및패키징학회지
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• 제19권1호
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• pp.47-53
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• 2012

무연 리플로우 공정 횟수에 따른 organic solderability preservative(OSP) 표면처리 두께변화 및 열화현상을 분석하였다. 무연솔더 접합부의 접합강도에 미치는 OSP 표면처리의 열화특성을 SnPb 표면처리 경우와 비교하여 조사하였다. 또한 리플로우 pass에 따른 무연솔더 접합강도 열화분석을 위해 OSP 및 SnPb 표면처리된 FR-4 재질 PCB를 각각 1-6회 리플로우 처리하였다. 이후 각 리플로우를 거친 PCB 위에 2012 칩 저항기를 실장한 후 접합강도 변화를 측정하였다. 그 결과, 리플로우 공정 중 열 노출에 의해 OSP 코팅두께가 감소되는 것이 관찰되었고, 코팅두께의 변화 및 OSP 코팅 층의 산화를 유발함으로써, 솔더의 젖음성이 감소될 수 있음을 확인할 수 있었다. OSP 열화에 따른 솔더 접합강도는 SnPb 표리처리시 평균 62.2 N 이였으며, OSP의 경우는 약 58.1 N 이였다. 리플로우 공정 노출에 따라 OSP 코팅 층은 열분해 되지만, 솔더 접합부의 접합강도 측면에서는 산업적으로 적용 가능성을 확인할 수 있었다.

• 한국재료학회지
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• 제9권3호
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• pp.288-294
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• 1999

솔더 범프를 사용하는 플립 칩 접속기술에서 범프와 칩 사이에 위치하는 금속 충들의 조합을 UBM(Under Bump Metallurgy)라고 부르며 이 UBM을 어떤 조합으로 사용하는 가에 따라 접속의 안정성이 크게 좌우된다. 본 연구에서는 UBM중에서 솔더 접착 층으로 사용되는 구리 층의 두께를 $1\mu\textrm{m}와 5\mu\textrm{m}$로 하는 한편 barrier 층으로 사용되는 금속 층을 Ti, Ni, Pd으로 변화시키면서 이들 UBM과 공정 납-주석 사이의 계면반응을 살펴보았다. 이를 위해 $100\mu\textrm{m}$ 크기의 솔더 범프를 전해도금법을 사용하여 제작하고 리플로 횟수와 시효시간에 따른 각 UBM에서의 금속간 화합물의 성장을 관찰하였다. $Cu_6Sn_5 \eta'$-상 금속간 화합물이 모든 조건에서 형성되었고 Cu층의 두께가 $5\mu\textrm{m}$로 두꺼운 경우에는 $Cu_3Sn \varepsilon$-상도 관찰되었다. Pd을 사용한 UBM 구조에서는 시효 처리시에 $Cu_6Sn_5$ 상 아래쪽에 $PdSn_4$상이 형성되었다. 또한 이들 계면에서의 금속간 화합물의 성장은 솔더 범프의 접속강도 값과 밀접한 관계를 가진다.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 ISMP Pb-free solders and the PCB technologies related to Pb-free solders
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• pp.233-241
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces strictly related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 ISMP Pb-free solders and the PCB technologies related to Pb-free solders
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• pp.211-219
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• 2004

A new alloy definition will be presented concerning increasing demands for the board level reliability of miniaturized interconnections. The damage mechanism for LFBGA components on different board finishes is not quite understood. Further demands from mobile phones are the drop test, characterizing interface performance of different package constructions in relation to decreased pad constructions and therefore interfaces. The paper discusses the characterization of interfaces based on SnPb, SnPbXYZ, SnAgCu and SnAgCuInNd ball materials and SnAgCuInNd as solder paste, the stability after accelerated tests and the description of modified interfaces stric시y related to the assembly conditions, dissolution behavior of finishes on board side and the influence of intermetallic formation. The type of intermetallic as well as the quantity of intermetallics are observed, primaliry the hardness, E modules describing the ability of strain/stress compensation. First results of board level reliability are presented after TCT-40/+150. Improvement steps from the ball formulation will be discussed in conjunction to the implementation of lead free materials. In order to optimize ball materials for area array devices accelareted aging conditions like TCTs were used to analyze the board level reliability of different ball materials for BGA, LFBGA, CSP, Flip Chip. The paper outlines lead-free ball analysis in comparison to conventional solder balls for BGA and chip size packages. The important points of interest are the description of processability related to existing ball attach procedures, requirements of interconnection properties and the knowledge gained the board level reliability. Both are the primary acceptance criteria for implementation. Knowledge about melting characteristic, surface tension depend on temperature and organic vehicles, wetting behavior, electrical conductivity, thermal conductivity, specific heat, mechanical strength, creep and relaxation properties, interactions to preferred finishes (minor impurities), intermetallic growth, content of IMC, brittleness depend on solved elements/IMC, fatigue resistance, damage mechanism, affinity against oxygen, reduction potential, decontamination efforts, endo-/exothermic reactions, diffusion properties related to finishes or bare materials, isothermal fatigue, thermo-cyclic fatigue, corrosion properties, lifetime prediction based on board level results, compatibility with rework/repair solders, rework temperatures of modified solders (Impurities, change in the melting point or range), compatibility to components and laminates.

• 마이크로전자및패키징학회지
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• 제13권1호통권38호
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• pp.23-29
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• 2006

Si-웨이퍼와 FR-4 기판을 상온에서 초음파 접합한 후, 접합부의 신뢰성을 평가하였다. Si-웨이퍼 상의 UBM(Under Bump Metallization)은 위에서부터 Cu/ Ni/ Al을 각각 $0.4{\mu}m,\;0.4{\mu}m,\;0.3{\mu}m$의 두께로 전자빔으로 증착하였다. FR-4 기판위의 패드는 위에서부터 Au/ Ni/ Cu를 각각 $0.05{\mu}m,\;5{\mu}m,\;18{\mu}m$의 두께로 전해 도금하여 형성하였다. 접합용 솔도로는 Sn-3.5wt%Ag을 두께 $100{\mu}m$으로 압연하여 사용하였다. 시편의 초음파 접합을 위하여 초음파 접합 시간을 0.5초에서 3.0초까지 0.5초 단위로 증가시키면서 상온에서 접합하였으며, 이 때 출력은 1,400W로 하였다. 실험 결과, 상온 초음파 접합법에 의해 신뢰성 있는 'Si-웨이퍼/솔더/FR-4기판' 접합부를 얻을 수 있었다. 접합부의 전단 강도는 접합 시간에 따라 증가하여 접합 시간 2.5초에서 65N으로 가장 높게 측정되었다. 이 후 접합 시간 3.0초에서는 전단 강도가 34N으로 감소하였는데, 이는 초음파 접합시간이 과도해지면서 Si-웨이퍼와 솔더 사이의 계면을 따라 균열이 발생되었기 때문으로 판단된다. 초음파 접합에 의해 Si-웨이퍼와 솔더 사이에서 생성된 금속간 화합물은 ($(Cu,Ni)_{6}Sn_{5}$)으로 확인되었다.