• Title/Summary/Keyword: Small-size bus

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Brake Juder Analysis for Small Size Bus

  • Kim, Jin-soo;Suh, Eun-Suk
    • International Journal of Precision Engineering and Manufacturing
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    • v.2 no.2
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    • pp.31-37
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    • 2001
  • In this paper, a method to improve judder by changing the front and rear wheel brake force distribution ratio was proposed. ADAMS, a commercial dynamic analysis software was used to model a small size bus and its modeling procedure was explained. By using the ADAMS vehicle model, the judder phenomena of the small bus were analyzed, and based on analysis results, the validity of the improvement method was proposed. Also in order to lessen the problem jubber sensitivity analysis and test results were proposed.

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A Study on Standardization of Data Bus for Modular Small Satellite (모듈화 소형위성의 Data Bus 표준화 방안 연구)

  • Jang, Yun-Uk;Chang, Young-Keun
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.38 no.6
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    • pp.620-628
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    • 2010
  • Small satellites can be used for various space research and scientific or educational purposes due to advantages in small size, low-cost, and rapid development. Small Satellites have many advantages of application to Responsive Space. Compared to traditional larger satellites, however, Small satellites have many constraints due to limitations in size. Therefore, it is difficult to expect high performance. To approach maximum capability with minimal size, weight, and cost, standard modular platform of Small satellites is necessary. Modularity supports plug-and-play architecture. The result is Small satellites that can be combined quickly and reliably using plug-and-play mechanisms. For communication between modules, standard bus interface is needed. Controller Area Network(CAN) protocol is considered optimum data bus for modular Small satellite. CAN can be applied to data communication with high reliability. Hence, design optimization and simplification can also be expected. For ease of assembly and integration, modular design can be considered. This paper proposes development method for standardized modular Small satellites, and describes design of data interface based on CAN and a method of testing for modularity.

Effective Partitioning of Static Global Buses for Small Processor Arrays

  • Matsumae, Susumu
    • Journal of Information Processing Systems
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    • v.7 no.1
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    • pp.85-92
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    • 2011
  • This paper shows an effective partitioning of static global row/column buses for tightly coupled 2D mesh-connected small processor arrays ("mesh", for short). With additional O(n/m (n/m + log m)) time slowdown, it enables the mesh of size $m{\times}m$ with static row/column buses to simulate the mesh of the larger size $n{\times}n$ with reconfigurable row/column buses ($m{\leq}n$). This means that if a problem can be solved in O(T) time by the mesh of size $n{\times}n$ with reconfigurable buses, then the same problem can be solved in O(Tn/m (n/m + log m)) time on the mesh of a smaller size $m{\times}m$ without a reconfigurable function. This time-cost is optimal when the relation $n{\geq}m$ log m holds (e.g., m = $n^{1-\varepsilon}$ for $\varepsilon$ > 0).

Design of a Small-Area, Low-Power, and High-Speed 128-KBit EEPROM IP for Touch-Screen Controllers (터치스크린 컨트롤러용 저면적, 저전력, 고속 128Kb EEPROMIP 설계)

  • Cho, Gyu-Sam;Kim, Doo-Hwi;Jang, Ji-Hye;Lee, Jung-Hwan;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.13 no.12
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    • pp.2633-2640
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    • 2009
  • We design a small-area, low-power, and high-speed EEPROM for touch screen controller IC. As a small-area EEPROM design, a SSTC (side-wall selective transistor) cell is proposed, and high-voltage switching circuits repeated in the EEPROM core circuit are optimized. A digital data-bus sensing amplifier circuit is proposed as a low-power technology. For high speed, the distributed data-bus scheme is applied, and the driving voltage for both the EEPROM cell and the high-voltage switching circuits uses VDDP (=3.3V) which is higher than the logic voltage, VDD (=1.8V), using a dual power supply. The layout size of the designed 128-KBit EEPROMIP is $662.31{\mu}m{\times}1314.89{\mu}m$.

Capacitor Bank Assisted Battery Fed Boost Converter for Self-electricity-generated Transportation Cart System (자가발전 이동 카트 시스템을 위한 배터리 - 캐패시터 뱅크를 갖는 부스트 컨버터)

  • Kong, Sung-Jae;Yang, Tae-Cheol;Kang, Kyung-Soo;Roh, Chung-Wook
    • The Transactions of the Korean Institute of Power Electronics
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    • v.23 no.1
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    • pp.1-8
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    • 2018
  • A problem exists in the conventional transportation cart applications, in which an external power supply with mechanical contact connection (bus bar connection) is required to drive the motor. Therefore, continuous effort for maintenance is required, aside from the expensive bus bar connector. To solve this problem, a self-electricity-generated transportation cart system without bus bar has recently been introduced. In this system, a battery needs to store the power of the generated wheel, and a boost converter, which converts the low battery voltage to high bus voltage to drive the motor inverter, is necessary. However, since the instantaneous large current required for starting the motor is supplied from the battery, a battery with large size and volume should be adopted to withstand this large current. In this study, a boost converter that can supply a large instantaneous current by using super Capacitor string is proposed. The proposed converter can be realized with a small size and volume compared with the conventional battery-fed boost converter. Operational principles, analysis, and design of the proposed converter are presented, and experimental results are provided to validate the proposed converter.

A Simple ESR Measurement Method for DC Bus Capacitor Using DC/DC Converter (DC/DC 컨버터를 이용한 DC Bus 커패시터의 간단한 ESR 측정 기법)

  • Shon, Jin-Geun;Kim, Jin-Sik
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.59 no.4
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    • pp.372-376
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    • 2010
  • Electrolytic capacitors have been widely used in power electronics system because of the features of large capacitance, small size, high-voltage, and low-cost. Electrolytic capacitors, which is most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. Therefore it is important to estimate the parameter of an electrolytic capacitor to predict the failure. The estimation of the equivalent series resistance(ESR) is important parameter in life condition monitoring of electrolytic capacitor. This paper proposes a simple technique to measure the ESR of an electrolytic capacitor. This method uses a switching DC/DC boost converter to measure the DC Bus capacitor ESR of power converter. Main advantage of the proposed method is very simple in technique, consumes very little time and requires only simple instruments. Simulation results are shown to verify the performance of the proposed method.

Development of a Finite Element Model for Crashworthiness Analysis of a Small-Sized Bus (소형버스 정면 충돌 특성 해석을 위한 유한요소 모델의 개발)

  • 김학덕;송주현;오재윤
    • Transactions of the Korean Society of Automotive Engineers
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    • v.10 no.1
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    • pp.153-161
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    • 2002
  • This paper develops a finite element model for crashworthiness analysis ova small-sized bus. The full vehicle finite element model is composed of 31,982 shell elements,599 beam elements,42 bar elements, and 34,204 nodes. The model uses four material models (such as elastic, elastic-plastic(steel), rigid. and elastic-plastic (rubber) material model) of PAM-CRASH. The model uses four contact types to define sliding interfaces in ten areas. A frontal crash test using an actual vehicle with 30mph velocity to a rigid barrier is carried out. Vehicle pulses at lower part of left and right b-pillar are measured, and deformed shapes of frame and driver seat's lower left area are photographed. A frontal crash simulation using the developed full vehicle finite element model is performed with PAM-CRASH installed in super computer SP2. The simulation is performed with the same conditions as the test. The measured vehicle pulses and photographed deformed shapes from the test are compared to ones from the simulation to validate the reliability of the developed model.

Real-Time Bus Reconfiguration Strategy for the Fault Restoration of Main Transformer Based on Pattern Recognition Method (자동화된 변전소의 주변압기 사고복구를 위한 패턴인식기법에 기반한 실시간 모선재구성 전략 개발)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers A
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    • v.53 no.11
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    • pp.596-603
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    • 2004
  • This paper proposes an expert system based on the pattern recognition method which can enhance the accuracy and effectiveness of real-time bus reconfiguration strategy for the transfer of faulted load when a main transformer fault occurs in the automated substation. The minimum distance classification method is adopted as the pattern recognition method of expert system. The training pattern set is designed MTr by MTr to minimize the searching time for target load pattern which is similar to the real-time load pattern. But the control pattern set, which is required to determine the corresponding bus reconfiguration strategy to these trained load pattern set is designed as one table by considering the efficiency of knowledge base design because its size is small. The training load pattern generator based on load level and the training load pattern generator based on load profile are designed, which are can reduce the size of each training pattern set from max L/sup (m+f)/ to the size of effective level. Here, L is the number of load level, m and f are the number of main transformers and the number of feeders. The one reduces the number of trained load pattern by setting the sawmiller patterns to a same pattern, the other reduces by considering only load pattern while the given period. And control pattern generator based on exhaustive search method with breadth-limit is designed, which generates the corresponding bus reconfiguration strategy to these trained load pattern set. The inference engine of the expert system and the substation database and knowledge base is implemented in MFC function of Visual C++ Finally, the performance and effectiveness of the proposed expert system is verified by comparing the best-first search solution and pattern recognition solution based on diversity event simulations for typical distribution substation.

Analysis on Electromagnetic Loss Characteristics of Bus bar and Enclosure according to the Specifications of Enclosures for a 24kV Switchgear (24kV급 배전반의 외함재질과 두께에 따른 Bus bar와 외함의 전자기 손실특성 분석)

  • Heo, Jeong Il;Hong, Jonggi;Kang, Hyoungku
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.62 no.4
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    • pp.181-185
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    • 2013
  • This paper deals with the electromagnetic loss characteristics of enclosures for a 24kV high voltage switchgear by using a finite element method (FEM). A study on the electromagnetic characteristics of enclosures for a high voltage switchgear should be conducted to minimize the size and the temperature rising of a switchgear. Generally, the enclosures made by stainless steel are used to minimize the eddy current loss caused by the transporting current in Bus bars due to its non-magnetic characteristics although the price of stainless steel is expensive compared with other metal for enclosures. Therefore, a switchgear made by stainless steel enclosures could be fabricated as a small size and are applied to a switchgear in urban substations. On the contrary, the switchgear enclosures made by steel could be fabricated with relatively cheap manufacturing price. However, the temperature easily rises due to the transporting current in Bus bars because steel is a ferromagnetic material. Therefore, the size of a switchgear made by steel enclosures is relatively massive and installed in rural substations. In this paper, the electromagnetic losses in the enclosures of a switchgear according to various enclosure thicknesses are calculated and compared with each other. Especially, we proposed a hybrid type enclosures for a switchgear made by stainless steel (top and bottom enclosure) and steel (left and right enclosure). It is concluded that the cost electromagnetic performance of applying the hybrid type enclosure is favorable to develop a high voltage switchgear.

Small Active Command Design for High Density DRAMs

  • Lee, Kwangho;Lee, Jongmin
    • Journal of the Korea Society of Computer and Information
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    • v.24 no.11
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    • pp.1-9
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    • 2019
  • In this paper, we propose a Small Active Command scheme which reduces the power consumption of the command bus to DRAM. To do this, we target the ACTIVE command, which consists of multiple packets, containing the row address that occupies the largest size among the addresses delivered to the DRAM. The proposed scheme identifies frequently referenced row addresses as Hot pages first, and delivers index numbers of small caches (tables) located in the memory controller and DRAM. I-ACTIVE and I-PRECHARGE commands using unused bits of existing DRAM commands are added for index number transfer and cache synchronization management. Experimental results show that the proposed method reduces the command bus power consumption by 20% and 8.1% on average in the close-page and open-page policies, respectively.