• 제목/요약/키워드: Sinusoidal output

검색결과 345건 처리시간 0.027초

3300V 1MVA H-브릿지 멀티레벨 인버터 개발 (Development of 3300V 1MVA Multilevel Inverter using Cascaded H-Bridge Cell)

  • 박영민;김연달;이현원;이세현;서광덕
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2003년도 춘계전력전자학술대회 논문집(2)
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    • pp.593-597
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    • 2003
  • Multilevel power conversion technology has received increasing attention recently for high power applications. The converters with the technology are suitable for high voltage and high power applications due to their ability to synthesize waveforms with better harmonic spectrum and apply for the high voltage equipment with a limited voltage rating of device. In the family of multilevel inverters, the topologies based on cascaded H-bridges are particularly attractive because of their modularity and simplicity of control. This paper presents multilevel inverter with cascaded H-bridge for large-power motor drives. The main features of this drive 1) reduce harmonic injection 2) can generate near-sinusoidal voltages, 3) have almost no common-mode voltage; 4) are low dv/dt at output voltage; 5)do not generate significant over-voltage on motor terminal; The topology of the developed product is presented and the feasibility study of the inverter on 3300v 1MVA 7-level H-bridge type was tarried out with experiments.

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An Improved SPWM Strategy to Reduce Switching in Cascaded Multilevel Inverters

  • Dong, Xiucheng;Yu, Xiaomei;Yuan, Zhiwen;Xia, Yankun;Li, Yu
    • Journal of Power Electronics
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    • 제16권2호
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    • pp.490-497
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    • 2016
  • The analysis of the switch status of each unit module of a cascaded multi-level inverter reveals that the working condition of the switch of a chopper arm causes unnecessary switching under the conventional unipolar sinusoidal pulse width modulation (SPWM). With an increase in the number of cascaded multilevel inverters, the superposition of unnecessary switching gradually occurs. In this work, we propose an improved SPWM strategy to reduce switching in cascaded multilevel inverters. Specifically, we analyze the switch state of the switch tube of a chopper arm of an H-bridge unit. The redundant switch is then removed, thereby reducing the switching frequency. Unlike the conventional unipolar SPWM technique, the improved SPWM method greatly reduces switching without altering the output quality of inverters. The conventional unipolar SPWM technique and the proposed method are applied to a five-level inverter. Simulation results show the superiority of the proposed strategy. Finally, a prototype is built in the laboratory. Experimental results verify the correctness of the proposed modulation strategy.

태양광 발전 시스템용 DC-DC 컨버터의 모델링 (Modeling of utility interactive photovoltaic system DC-DC converter)

  • 문상필;박영조;김영문;강욱중;이현우;서기영
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
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    • pp.215-217
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    • 2002
  • In this paper, a new converter for utility interactive photovoltaic system is proposed, the conventional utility interactive photovoltaic system is composed of a PWM inverter and a DC converter. However, the increased switching loss and the high frequency switching noise become a problem. the control accuracy of the system is made to lower by the dead time of the switching devices. and it becomes a cause of the lower conversion efficiency. In order to resolve those problems, we applied a non- dissipative snubber circuit to a converter, which generates the single phase absolute value of sinusoidal current. the converter consists of two switching devices and one capacitor which constitute a non-dissipative snubber circuit. the proposed circuit is very useful to minimize and increase efficiency, when it is used to an utility interactive photovoltaic system. it is confirmed by simulation that the proposed converter for new photovoltaic system has stable operation and good output.

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영상태 벡터를 사용하지 않는 매트릭스 컨버터의 공통모드 전압 저감에 관한 연구 (The Reduction of Common-Mode Voltage in Matrix Converter without Using Zero Space Vector)

  • 윈민항;이홍희;정의헌;전태원;김흥근
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2005년도 전력전자학술대회 논문집
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    • pp.638-642
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    • 2005
  • This paper proposes a modified space-vector pulse width modulation (PWM) strategy which can restrict the common-mode voltage for three-phase to three-phase matrix converter and still keep sinusoidal input and output waveforms and unity power factor at the input side. The proposed control method has been developed based on contributing the appropriate space vectors instead of using zero space vectors. The advantages of this proposed method is to reduce the peak value of common-mode voltage to 42% beside the lower high harmonic components as compared to the conventional SVM method. Hence, the new table is also presented with the new space vector rearrangement. Furthermore, the voltage transfer ratio is unaffected by the proposed method. A simulation of the overall system has been carried out to validate the advantages of the proposed method.

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Two Phase Clocked Adiabatic Static CMOS Logic and its Logic Family

  • Anuar, Nazrul;Takahashi, Yasuhiro;Sekine, Toshikazu
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권1호
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    • pp.1-10
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    • 2010
  • This paper proposes a two-phase clocked adiabatic static CMOS logic (2PASCL) circuit that utilizes the principles of adiabatic switching and energy recovery. The low-power 2PASCL circuit uses two complementary split-level sinusoidal power supply clocks whose height is equal to $V_{dd}$. It can be directly derived from static CMOS circuits. By removing the diode from the charging path, higher output amplitude is achieved and the power consumption of the diode is eliminated. 2PASCL has switching activity that is lower than dynamic logic. We also design and simulate NOT, NAND, NOR, and XOR logic gates on the basis of the 2PASCL topology. From the simulation results, we find that 2PASCL 4-inverter chain logic can save up to 79% of dissipated energy as compared to that with a static CMOS logic at transition frequencies of 1 to 100 MHz. The results indicate that 2PASCL technology can be advantageously applied to low power digital devices operated at low frequencies, such as radio-frequency identifications (RFIDs), smart cards, and sensors.

동기 발진기를 이용한 PN 부호 동기에 관한 연구 (On the PN Code Synchronization Using Synchronous Oscillator)

  • 정명덕;박재홍;박재운
    • 한국컴퓨터정보학회논문지
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    • 제3권4호
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    • pp.35-43
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    • 1998
  • 본 논문은 DS/SS의 동기 복조를 위한 동기발진기의 특성에 대하여 연구하였다. 동기발진기는 외부신호가 인가되지 않을 때에는 고유 주파수를 발진하고. 고조파 및 저조파의 외부 신호가 인가되면 동기발진기는 인가 신호를 추적하여 동조한다 따라서 출력은 광대역의 외부 주파수에 동기 하므로서 주파수 분주와 주파수 증배에 이용 할 수 있으며, 디지탈 통신에 있어서 동기 문제점을 해결 할 수 있는 방안을 제시하였으며, 이와 같은 특성을 이용하여 DS/SS 동기 적용을 위한 실험에서 양호한 동기 특성을 얻을 수 있었다. 본 연구논문은 1998년 부산정보대학의 학술 연구조성비로 이루어졌으며, 지원해주신 부산정보대학에 감사드립니다.

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캐리어를 이용한 매트릭스 컨버터의 전압 변조 방법 (Carrier-based Modulation Method for Matrix Converter)

  • 윤영두;설승기
    • 전력전자학회논문지
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    • 제10권6호
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    • pp.543-549
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    • 2005
  • 본 논문에서는 캐리어(Carrier)를 이용한 매트릭스 컨버터(Matrix Converter)의 전압 변조 방법을 제안한다. 출력상전압에 적절한 옵셋(Offset) 전압을 더하고, 캐리어 파형의 기울기를 적절히 제어함으로써 입력 전류를 역율 1의 정현파로 제어하면서 동시에 출력 전압의 합성이 가능하다. 이 방법은 기존의 매트릭스 컨버터 전압 변조 방법인 SVPWM과 동일한 스위칭 패턴을 나타내지만, 그 구현은 훨씬 간단한다. 또한 기존의 전압형 인버터(Voltage Source Inverter, VSI)에서 발전된 2상/3상 변조, 과변조(Over Modulation) 등의 개념을 유사하게 적용할 수 있어 그 활용도가 매우 논다. Matlab/Simulink를 이용한 시뮬레이션 결과와 실험을 통해 제안된 방법의 타당성을 검증하였다.

SVM를 적용한 매트릭스 컨버터의 설계 및 구현 (Design and Implementation of Matrix Converter Based on Space Vector Modulation)

  • 양천석;윤인식;김경서
    • 전력전자학회논문지
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    • 제10권6호
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    • pp.550-559
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    • 2005
  • 매트릭스 컨버터는 VS떼 비하여 장수명, 입력역률 직접제어 및 에너지 회생 등의 장점을 갖고 있으나, 제어의 복잡성, ride-through 대책 및 낮은 전압이용률 등은 상용화를 위해 해결해야 할 난제이다. 본 논문에서는 SVM를 적용한 매트릭스 컨버터의 설계 및 구현방법을 제안한다. 입력 고조파를 저감시키기 위한 입력필터와 입출력의 과전압 방지와 free-wheeling을 위한 클램프 회로의 설계기법을 제시하고, 고속 DSP와 CPLD를 사용하여 공간벡터 제어 및 4 단계 전류(commutation) 제어를 구현하며, 매트릭스 컨버터의 양방향 스위치 구동을 위한 전용의 전원회로를 설계하여, 최적 구조의 전력회로를 제안한다. 그리고 구현된 매트릭스 컨버터를 유도전동기에 적용하여 성공적인 운전 결과를 얻을 수 있었다.

Application of Fuzzy PI Control Algorithm as Stator Power Controller of a Double-Fed Induction Machine in Wind Power Generation Systems

  • Chung, Gyo-Bum;Choi, Jae-Ho
    • Journal of Power Electronics
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    • 제9권1호
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    • pp.109-116
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    • 2009
  • This paper addresses the output control of a utility-connected double-fed induction machine (DFIM) for wind power generation systems (WPGS). DFIM has a back-to-back converter to control outputs of DFIM driven by the wind turbine for WPGS. To supply commercially the power of WPGS to the grid without any problems related to power quality, the real and reactive powers (PQ) at the stator side of DFIM are strictly controlled at the required level, which in this paper is realized with the Fuzzy PI controller based on the field orientation control. For the Sinusoidal Pulse Width Modulation (SPWM) converter connected to the rotor side of DFIG to maintain the controllability of PQ at the state side of DFIM, the DC voltage of the DC link capacitor is also controlled at a certain level with the conventional Proportion-Integral (PI) controller of the real power. In addition, the power quality at the grid connected to the rotor side of DFIM through the back-to-back converter is maintained in a certain level with a PI controller of the reactive power. The controllers for the PQ at the stator side of DFIM, the DC link voltage of the back-to-back inverter and the reactive power at the grid connected to the rotor side of DFIM are designed and simulated in the PSIM program, of which the result verifies the performance of the proposed controllers.

FPGA Based Robust Open Transistor Fault Diagnosis and Fault Tolerant Sliding Mode Control of Five-Phase PM Motor Drives

  • Salehifar, Mehdi;Arashloo, Ramin Salehi;Eguilaz, Manuel Moreno;Sala, Vicent
    • Journal of Power Electronics
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    • 제15권1호
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    • pp.131-145
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    • 2015
  • The voltage-source inverters (VSI) supplying a motor drive are prone to open transistor faults. To address this issue in fault-tolerant drives applicable to electric vehicles, a new open transistor fault diagnosis (FD) method is presented in this paper. According to the proposed method, in order to define the FD index, the phase angle of the converter output current is estimated by a simple trigonometric function. The proposed FD method is adaptable, simple, capable of detecting multiple open switch faults and robust to load operational variations. Keeping the FD in mind as a mandatory part of the fault tolerant control algorithm, the FD block is applied to a five-phase converter supplying a multiphase fault-tolerant PM motor drive with non-sinusoidal unbalanced current waveforms. To investigate the performance of the FD technique, the fault-tolerant sliding mode control (SMC) of a five-phase brushless direct current (BLDC) motor is developed in this paper with the embedded FD block. Once the theory is explained, experimental waveforms are obtained from a five-phase BLDC motor to show the effectiveness of the proposed FD method. The FD algorithm is implemented on a field programmable gate array (FPGA).