• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.4A
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• pp.402-411
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• 2006

In OFDMA system, multiple users transmit signal through the subcarriers assigned to the user. Capabilities of high data-rate transmission in OFDMA system come from the ability to compensate the ICI (Inter Carrier Interference) using a single-tap equalizer and to implement transmitter and receiver by employing high speed FFT circuitry. Issues of time and frequency synchronization in OFDM system is quite essential to preserve the orthogonality among subcarriers not to produce ICI. In this paper, we Int analyze the preamble used in 802.16 d/e and WiBro system. Then we propose an effective timing synchronization algorithm, which is more accurate than the conventional one in the sense of timing position, and integral frequency offset estimation scheme for the simultaneouse estimation of the fractional and integral frequency offset. Through the simulation utilizing the proposed synchronization algorithm and structure, we show that the performance degradation due to the adjacent channel interference can be mitigated for the than conventional ones.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.101-111
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• 2008

This paper introduces a high-speed Reed-Solomon(RS) decoder, which reduces the hardware complexity, and presents an RS decoder based FEC architecture which is used for 40Gb/s optical communication systems. We introduce new pipelined degree computationless modified Euclidean(pDCME) algorithm architecture, which has high throughput and low hardware complexity. The proposed 16 channel RS FEC architecture has two 8 channel RS FEC architectures, which has 8 syndrome computation block and shared single KES block. It can reduce the hardware complexity about 30% compared to the conventional 16 channel 3-parallel FEC architecture, which is 4 syndrome computation block and shared single KES block. The proposed RS FEC architecture has been designed and implemented with the $0.18-{\mu}m$ CMOS technology in a supply voltage of 1.8 V. The result show that total number of gate is 250K and it has a data processing rate of 5.1Gb/s at a clock frequency of 400MHz. The proposed area-efficient architecture can be readily applied to the next generation FEC devices for high-speed optical communications as well as wireless communications.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.40 no.12
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• pp.2353-2362
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• 2015

In this paper, we employ the single channel full duplex radio for wireless local area network (WLAN) systems, and design digital interference cancellers using adaptive signal processing. When the full duplex scheme is used for WLAN systems with multiple transmit and receive antennas, some interference is caused through the feedback of transmit signals from multiple antennas. To remove the feedback interference, we derive the least mean square (LMS), normalized LMS (NLMS), and recursive least squares (RLS) algorithms based on adaptive signal processing techniques. In addition, we analyze the theoretical convergence of the proposed LMS and RLS methods. The channel capacity of full duplex radios increases by two times than that of half duplex radios, when the packet error rate (PER) performances for the two systems are identical. Through numerical simulations in WLAN systems, it is shown that the full duplex method with the proposed interference cancellers has a similar PER performance with the conventional half duplex transmission scheme.

• Journal of Broadcast Engineering
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• v.5 no.2
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• pp.167-175
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• 2000

Compressed bitstreams generated by an MPEG-2 video encoder (or digital TV picture transmission are quite sensitive to channel errors. Due to the coding structure of the MPEG-2 video compression algorithm, a single bit error can affect not only the current Picture frame but also succeeding frames. Error concealment algorithms attempt to repair damaged portions of the picture by exploiting spatial and temporal redundancies in the correctly received and reconstructed video frames. In this paper, we analyze the effect of channel errors in MPEG-2 video bitstreams and estimate lost motion vectors by exploiting temporal redundancies in the video frames. Motion vectors can be estimated from the vertically adjacent extended region of lost macroblocks. Finally, we conceal the damaged macroblocks by compensating the displacement with the estimated motion vectors. Simulation results demonstrate that both the weighted sum algorithm and the extension matching algorithm achieve good performance in terms of PSNR values as well as subjective image quality.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.4C
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• pp.411-417
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• 2007

The rate control is an essential component in video coding to provide better quality under given coding constraints, such as channel capacity, frame rates, etc. In general, source data cannot be described as a single distribution in a video coding, hence it can cause an exhaustive approximation problem. It drops a coding efficiency under weak channel environments, such as mobile communications. In this paper, we design a new quantization parameter decision model that is based on a rate-distortion function of generalized Gaussian distribution. In order to adaptively express various source data distribution, we decide a shape parameter by observing a ratio of samples, which have a small value. For experiment, the proposed algorithm is implemented into H.264/AVC video codec, and its performance is compared with that of MPEG-2 TM5, H.263 TMN8 rate control algorithm. As shown in simulation results, the proposed algorithm provides an improved quality rather than previous algorithms and generates the number of bits closed to the target bits.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.4
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• pp.399-407
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• 2010

SC-FDMA system uses DFT-spreading method for reducing the PAPR of OFDM signal, which improves the power efficiency. Block type pilot is used in SC-FDMA system. However, there are ICI due to the inevitable phase noise and frequency offset that can be generated from the Doppler frequency and inaccuracy between the transceiver oscillators. This ICI definitely degrades the BER performance. To overcome this problem and estimate the channel efficiently, we like to propose ICI compensation algorithm for the SC-FDMA system with comb type pilot. SLM method is additionally included for the PAPR reduction when pilot is assigned in comb type. Finally, it is confirmed that the ICI due to the phase noise and frequency offset is efficiently compensated by the suggested algorithm.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.10
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• pp.110-116
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• 2017

This paper presents an effective demosaicking algorithm for color filter array (CFA) images acquired from single-sensor devices based on directional interpolation and nonlocal properties of the image. We interpolate the G channel considering diagonal directions as well as horizontal and vertical directions, using a small number of pixels to reflect local properties of the image. Then, we overcome image degradations, such as zipper effects near edges and false colors, by applying nonlocal means (NLM) filtering to the interpolated pixels. R and B channels are reproduced by using directional interpolation with information of the reconstructed G channel and NLM filtering. Experimental results for various McMaster images with high saturation and color changes show that the proposed algorithm accomplishes high PSNR compared with conventional methods. Moreover, the proposed method demonstrates better subjective quality compared with existing methods in terms of reduction of quality degradation, like false colors, and preservation of the image structures, such as edges and textures.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.3
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• pp.664-674
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• 1996

In high speed multi-wavelength networks, retransmission overhead due to desination conflict or control packet collision is one factor of performance degration because signal prpagation delay is much larger than the transmission time of data packet. In this paper, an efficient WDMA protocol with a collision avoidance mechanism is proposed for high speed WDM single-hop network with a passive star topology. In proposed protocol, each node has cource queues and routing table to store souting informatio. This architecture makes is possible to avoid any kind of collision when a node reserves the channel to transmit a data packet. High system thoughput and channel utilization can be achieved by proposed protocol since there are no discarded packets caused by any collision at transmission time. The performance of proposed protocol is evaluated in term of throughput and delay with variations in offered load. Simulation results show that the proposed protocol has superior performance to convertional protocols under nonuniform traffic as well as uniform traffic.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.30 no.12C
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• pp.1133-1143
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• 2005

In this paper, we propose an enhanced two-step search scheme for rapid and reliable signal acquisition in UWB systems under multipath channels. The proposed TSS-LS (Two-Step Search scheme with the Linear search based Second step) achieves rapid acquisition performance comparable to the conventional TSS-BS (Two-Step Search scheme with the Bit reversal search based Second step) already proposed by the authors, based on the single-dwell search with two-step thresholds and search windows. However, unlike the TSS-BS which employs the bit reversal search in the second step, the proposed TSS-LS utilizes the linear search in the second step to improve the reliability of signal acquisition. Simulation results with multipath channel models by IEEE 802.15.3a show that the two-step search schemes for the UWB signal acquisition can achieve sig nificant reduction of the required mean acquisition time as compared to general search schemes. In addition, we observe that the proposed TSS-LS achieves quite good bit error rate performance for large signal-to-noise ratios, which is favorably comparable to the case of ideal perfect timing.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.49 no.3
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• pp.74-80
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• 2012

Recently at SCIS2011, Nakatsu et. al. proposed multi-round Correlation Power Analysis(CPA) on Hardware Advanced Encryption Standard(AES) to improve the performance of CPA with limited number of traces. In this paper, we propose, Multi-Round CPA to retrieve master key using CPA of 1round and 2round on Hardware DES. From the simulation result for the proposed attack method, we could extract 56-bit master key using the 300 power traces of Hardware DES in DPA contes. And it was proved that we can search more master key using multi-round CPA than using single round CPA in limited environments.