• Journal of Advanced Marine Engineering and Technology
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• v.38 no.7
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• pp.916-922
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• 2014

Diode rectifiers have been widely used for an AC to DC converter. But a big problem is that they include large harmonics components in the input currents. A 12-pulse configuration with phase shifting transformer is useful for reducing them. however, it still includes the ($12{\pm}1$)th (m; integer) harmonics in the input currents. In this paper, we propose a single-phase square wave auxiliary voltage supply which is inserted in the middle DC bus. It reduces harmonics especially the 11th and 13th and the harmonic characteristic becomes almost equivalent to a 24-pulse rectifier. Theoretical analysis of the combined 12-pulse diode rectifier with the auxiliary supply is presented and a control method of the auxiliary supply is proposed. The reduction in the input current harmonics is verified by simulation using software PSIM.

• Journal of Electrical Engineering and Technology
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• v.10 no.5
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• pp.2018-2030
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• 2015

A two stage ac drive configuration consisting of a single-phase line commutated rectifier and a three-phase voltage source inverter (VSI) is very common in low and medium power applications. The deterministic pulse width modulation (PWM) methods like sinusoidal PWM (SPWM) could not be considered as an ideal choice for modern drives since they result mechanical vibration and acoustic noise, and limit the application scope. This is due to the incapability of the deterministic PWM strategies in sprawling the harmonic power. The random PWM (RPWM) approaches could solve this issue by creating continuous harmonic profile instead of discrete clusters of dominant harmonics. Insufficient filtering at dc link results in the amplitude distortion of the input dc voltage to the VSI and has the most significant impact on the spectral errors (difference between theoretical and practical spectra). It is obvious that the sprawling effect of RPWM undoubtedly influenced by input fluctuation and the discrete harmonic clusters may reappear. The influence of dc link fluctuation on harmonics and their spreading effect in the VSI remains invalidated. A case study is done with four different filter capacitor values in this paper and results are compared with the constant dc input operation. This paper also proposes an ingenious RPWM, a ripple dosed sinusoidal reference-random carrier PWM (RDSRRCPWM), which has the innate capacity of suppressing the effect of input fluctuation in the output than the other modern PWM methods. MATLAB based simulation study reveals the fundamental component, total harmonic distortion (THD) and harmonic spread factor (HSF) for various modulation indices. The non-ideal dc link is managed well with the developed RDSRRCPWM applied to the VSI and tested in a proto type VSI using the field programmable gate array (FPGA).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.11
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• pp.2009-2014
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• 2017

A novel structure of phase locked loop (PLL) with a time constant comparator and a current compensator has been proposed. The proposed PLL uses small capacitors which are impossible for stable operation in a conventional PLL. It is small enough to be integrated into a single chip. The time constant comparator detects the loop filter output voltage variations using signals which are passed through small and large RC time constants. The signal from the large RC time constant node is the average of the loop filter output voltage. The output voltage of another node is approximately equal to the present loop filter voltage. The output of the time constant comparator controls a current compensator and charge/discharge small size loop filter capacitors. It makes the proposed PLL operate stably. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Korean Journal of Optics and Photonics
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• v.5 no.2
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• pp.278-285
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• 1994

We investigated the spectral characteristics for temperature and driving current change in visible laser diode. As a result of spectrum analysis, the ratio of frequency change for temperature and driving current change were about $33 GHz/^{\circ}C$, 6.6 GHz/mA in the region which was not mode hopping range. Compared to the sharp mode hopping in the near IR single mode AlGaAs lasers, the visible laser diode showed relatively broad multimode operation in the mode hopping region. We performed the experiment of injection-locking characteristics analysis for visible laser diode. Locking half bandwidth(LHBW) was measured 0~5.0 GHz for $0~25\muW$ input power and it was dependent on the input power. Also, LHBW for polarization angle was dependent on the difference of polarization angle between master laser and slave laser. The phase change of injection-locked output beam of the slave laser diode as a function of the drive current was measured in the interferometer which was composed of master laser and slave laser. The ratio of phase change with the slope of 5.0~1.3 rad/mA was obtained within injection-locking range for the change of $2~25\muW$ input power. power.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.130-134
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• 2008

This paper presents a clock and data recovery(CDR) using a quarter-rate technique. The proposed CDR helps reduce the VCO frequency and is thus advantageous for high speed application. It can achieve a low jitter operation and extend the pull-in range without a reference clock. The CDR consists of a quarter-rate bang-bang type phase detector(PD) quarter-rate frequency detector(QRFD), two charge pumps circuits(CPs), low pass filter(LPF) and a ring voltage controlled oscillator(VCO). The Proposed CDR has been fabricated in a standard $0.18{\mu}m$ 1P6M CMOS technology. It occupies an active area $1{\times}1mm^2$ and consumes 98 mW from a single 1.8 V supply.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.2
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• pp.202-208
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• 2001

A Switched Reluctance Motor(SRM) has double salient poles structure and the phase windings are wound in stator. SRM hase more simple structure that of other motor, thus manufacture cost is low, mechanically strong, reliable to a poor environment such as high temperature, and maintenance cost is low because of brushless. SRM needs position detector to get rotator position information for phase excitation and tachometer or encoder for constant speed operation. But, this paper doesn\`s use an encoder of high cost for velocity measurement of rotator. Instead of it, the algorithm for position detection and velocity estimation from simple slotted disk has been proposed and developed. To implement variable speed digital control system with velocity estimation algorithm, the TMS320F240-20MIPS fixed point arithmetic processor of TI corporation is used. The experimental results of the developing system are enable to control speed with wide range, not only single pulse, hard chopping mode and soft chopping, ut also variable speed control, and advance angle control.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.283-286
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• 2003

The electric traction load is quite differ from general power system load which is single-phase, high-speed heavy load receiving power from 3-phase power system and also has variable load characteristics over time and space. Therefore, there are inevitably power quality problems such as steady state or transient voltage drop, voltage imbalance and harmonic distortion. In addition, it is expected that transient voltage sag could affect the safety of feeding system. Thus, in this paper transient analysis and voltage sag compensation of AT(Auto Transformer) feeding system are studied. The fault study of traction network is analysed by using PSCAD/SMTDC simulation tool. In addition, application of DVR in electric traction system is proposed to compensate the voltage sag of traction network which is occurred by the fault of utility source. The results of fault study will be a useful research works for operation and setting of electric traction relay. Also, it can be shown that application of the DVR in electric system is very useful to compensate the voltage sag from the result of related simulated work. The results of study will be a useful research works for management and planning of power quality in electric traction system.

• The Transactions of the Korean Institute of Power Electronics
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• v.9 no.5
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• pp.491-497
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• 2004

This paper presents a new rotor position estimation method for brushless DC motors. It is clear that the estimation error of the rotor position provokes the phase shift angle misaligned between the phase current and the back-EMF waveforms, which causes torque ripple in brushless DC motor drives. Such an estimation error can be reduced with the help of the proposed neutral voltage-based estimation method that is structured in the form of a closed loop observer. A neutral voltage appearing during the normal mode of the inverter operation is found to be an observable and controllable measure, which can be dealt with for estimating an exact rotor position. This neutral voltage is obtained from the DC-link current, the switching logic, and the motor speed values. The proposed algorithm, which can be implemented easily by using a single DC-link current and the motor terminal voltage sensors, is verified by simulation and experiment results.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.9C
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• pp.871-878
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• 2002

The cartesian loop chip which is one of key devices in narrow-band Walky-Talky transmitter using RZ-SSB modulation method was designed and implemented with 0.35 ㎛ CMOS technology. The reduced size and low cost of transmitter were available by the use of direct-conversion and cartesian loop chip, which improved the power efficiency and linearity of transmitter. In addition, low power operation was possible through CMOS technology. The performance test results of transmitter showed -23㏈c improvement of IMD and -30㏈c below suppression of SSB characteristic in the operation of cartesian loop chip (closed-loop). At that time, the transmitting power was about 37㏈m (5W). The main parameters to improve the transmitting characteristic and to compensate the distortion in feed back loop such as DC-offset, loop gain and phase value are interfaced with notebook PC to be controlled with S/W.

• Aerospace Engineering and Technology
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• v.11 no.2
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• pp.73-79
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• 2012

Because the contact time between satellite and ground station is very limited in LEO (Low Earth Orbit) satellite, all telemetry data generated on spacecraft bus are stored in a mass memory and downlinked to the ground together with real time data during the contact time. The mass memory is initialized in the first system initialization phase and the page status of each memory block is generated step by step. After the completion of the system initialization, the telemetry data are continuously stored and the stored data are played back to the ground by command. And the memory scrubbing is periodically performed for correction of single bit error which can be generated on harsh space environment. This paper introduces the mass memory operation method for telemetry processing of LEO satellite. It includes a general mass memory data structure, the methods of mass memory initialization, scrubbing, data storage and downlink, and mass memory management of primary and redundant mass memory.