• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1998년도 추계학술대회 논문집 학회본부A
• /
• pp.117-120
• /
• 1998

This paper proposes a new high efficiency single-phase AC-DC boost converter for power factor correction. Lossless commutation circuit is interposed in the proposed converter for soft-switching. Due to this commutation circuit, the converter operates in 9 mode. In spite of changing input voltage and load, It attracts a constant DC output voltage because of the PWM control scheme using both the output voltage feedback and the input voltage feedforward. The converter is suitable for high power applications and operates in continuous conduction mode. In this paper, a 2.4[kW] converter is designed and simulated.

• Journal of Power Electronics
• /
• 제11권4호
• /
• pp.542-550
• /
• 2011

This paper describes the design and hardware implementation of a Single Input Fuzzy Logic Controller (SIFLC) to regulate the output voltage of a boost power converter. The proposed controller is derived from the signed distance method, which reduces a multi-input conventional Fuzzy Logic Controller (CFLC) to a single input FLC. This allows the rule table to be approximated to a one-dimensional piecewise linear control surface. A MATLAB simulation demonstrated that the performance of a boost converter is identical when subjected to the SIFLC or a CFLC. However, the SIFLC requires nearly an order of magnitude less time to execute its algorithm. Therefore the former can replace the latter with no significant degradation in performance. To validate the feasibility of the SIFLC, a 50W boost converter prototype is built. The SIFLC algorithm is implemented using an Altera FPGA. It was found that the SIFLC with asymmetrical membership functions exhibits an excellent response to load and input reference changes.

• Journal of Power Electronics
• /
• 제7권4호
• /
• pp.328-335
• /
• 2007

A conventional Single-Stage Power-Factor-Correction (PFC) AC/DC converter has a link capacitor voltage problem under high line input and low load conditions. In this paper, this problem is analyzed by using the voltage conversion ratio of the DC/DC conversion cell. By applying this analysis, a new Single-Stage PFC AC/DC converter with a boost PFC cell integrated with a Voltage-Doubler Rectified Asymmetrical Half-Bridge (VDRAHB) is proposed. The proposed converter features good power factor correction, low current harmonic distortions, tight output regulations and low voltage of the link capacitor. An 85W prototype was implemented to show that it meets harmonic requirements and standards satisfactorily with near unity power factor and high efficiency over universal input.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
• /
• pp.207-210
• /
• 2002

This paper describes a design of multiple-mode single-output DC/DC converter which can be used in both up and down conversion. Proposed up/down converter does not produce a negative voltage which is generated in conventional buck-boost type converter. Three types of operation mode(up/down/bypass) are controlled by the input voltage sense and command signals of target output voltage. PFM(pulse frequency modulation) control is adopted and modified for fast tracking and for precise output voltage level with an aid of output voltage sense. Designed DC/DC converter has the performance of less than 5 % ripple and higher than 80 % efficiency. Chip area is 3.50 mm ${\times}$ 2.05 mm with standard 0.35 $\mu\textrm{m}$ CMOS technology.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 하계학술대회 논문집 B
• /
• pp.1232-1234
• /
• 2003

The push pull forward converter is a very suitable circuit for low output voltage, high output current applications with a wide input voltage range. This converter can be miniaturized by integrate magnetic components such as the output inductor, the transformer and the input inductor. We considered of the efficiency for the push pull forward converter. Developed the push pull forward converter rating are of $36{\sim}72V$ input and 3.3V/30A output. In this converter. the efficiency was measured by 76.4% at full load and 82.95% at half load. The maximum efficiency is up to 83.% at 200kHz, 11A output.

• Journal of Electrical Engineering and Technology
• /
• 제8권6호
• /
• pp.1352-1364
• /
• 2013

This paper describes a novel structure for single phase Unified Power Quality Conditioner-Distributed Generation (UPQC-DG) with direct grid connected DC-AC converter for low DC output DG systems which can be used not only for compensation of power quality problems but also for supplying of load power partly. This converter has been composed of one full-bridge inverter, one three winding high frequency transformer with galvanic isolation and two cycloconverters. Proper control based on Input Output feedback Linearization is used to tracking the reference signals. The simulation and experimental results are presented to confirm the validity of the proposed approach.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제14권5호
• /
• pp.549-556
• /
• 2014

This paper proposes a highly power-efficient single-inductor multiple-outputs (SIMO) DC-DC converter with a gate charge sharing method in which gate charges of output switches are shared to improve the power efficiency and to reduce the switching power loss. The proposed converter was fabricated by using a $0.18{\mu}m$ CMOS process technology with high voltage devices of 5 V. The input voltage range of the converter is from 2.8 V to 4.2 V, which is based on a single cell lithium-ion battery, and the output voltages are 1.0 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V. Using the proposed gate charge sharing method, the maximum power efficiency is measured to be 87.2% at the total output current of 450 mA. The measured power efficiency improved by 2.1% compared with that of the SIMO DC-DC converter without the proposed gate charge sharing method.

• Journal of Power Electronics
• /
• 제15권6호
• /
• pp.1468-1479
• /
• 2015

Renewable energy resources such as wind and photovoltaic power generation systems demand a high step-up DC-DC converters to convert the low voltage to commercial grid voltage. However, the high step-up converter using a transformer has limitations of high voltage stresses of switches and diodes when the transformer winding ratio increases. Accordingly, conventional studies have been applied to series-connect multioutput converters such as forward-flyback and switched-capacitor flyback to reduce the transformer winding ratio. This paper proposes new single-ended converter topologies of an isolation type and a non-isolation type to improve power efficiency, cost-effectiveness, and output ripple. The first proposal is an isolation-type charge-pump switched-capacitor flyback converter that includes an extreme-ratio isolation switched-capacitor cell with a chargepump circuit. It reduces the transformer winding number and the output ripple, and further improves power efficiency without any cost increase. The next proposal is a non-isolation charge-pump switched-capacitor-flyback tapped-inductor boost converter, which adds a charge-pump-connected flyback circuit to the conventional switched-capacitor boost converter to improve the power efficiency and to reduce the efficiency degradation from the input variation. In this paper, the operation principle of the proposed scheme is presented with the experimental results of the 100 W DC-DC converter for verification.

• Journal of Power Electronics
• /
• 제13권4호
• /
• pp.636-646
• /
• 2013

A single-phase tapped-inductor boost converter has been proposed previously. However, detailed characterization and performance analysis were not conducted. This paper presents a detailed characterization, performance analysis, and design expressions of a single-phase tapped-coupled-inductor boost converter. Expressions are derived for average and RMS input current as well as for RMS input and output capacitor current ripple. A systematic approach for sizing the tapped-coupled inductor, active switch, and output diode is presented; such approach has not been reported in related literature. This study reveals that sizing of the inductor has to be based on current ripple requirement, turns ratio, and load. Conditions that produce discontinuous inductor current are also discussed. Analysis of a non-ideal converter operating in continuous conduction mode is also conducted. The expression for the voltage ratio considering the coupling coefficient is derived. The suitability of the converter for high-voltage step-up applications is evaluated. Factors that affect the voltage boost ratio are also identified. The effects of duty ratio and load variation on the performance of the converter are also investigated. The theoretically derived characteristics are validated through simulations. Experimental results obtained at a low power level are included to validate the analytical and simulation results. A good agreement is observed among the analytical, simulation, and experimental results.

• 전력전자학회논문지
• /
• 제10권6호
• /
• pp.592-597
• /
• 2005

푸시 풀 포워드 컨버터는 넓은 입력범위에서 저전압 대전류 특성이 좋고 싱글 EI-EE 코어에 출력 인덕터와 변압기 그리고 입력 필터 등 모든 자성소자들을 포함시킴으로써 집적화할 수 있다. 회로의 여러 변수들에 대한 효율 비교를 통해서 집적화된 싱글 코어 푸시 풀 포워드 컨버터에 대해 고찰하였다. 푸시 풀 포워드 컨버터의 변압기는 Nicera사의 5M FEE 18/8/10C와 NC-2H FEI32/8/10C 코어를 이용하였다. 컨버터의 정격은 입력 전압 $36\~72V$이며 출력은 3.3V, 30A이다. NC-2H FEI32/8/10C코어를 사용하였을 경우 스위칭 주파수가 200kHz이고 부하가 11A일 때 $83.5\%$의 최고 효율이 측정되었다. 전부하(full load)시의 효율은 $76.4\%$, 반부하(half load)일 경우에는 $82.95\%$의 효율이 각각 측정 됐다.