• Journal of information and communication convergence engineering
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• 제6권4호
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• pp.417-420
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• 2008

Solar electric systems have very little impact on environment, making them one of the cleanest power-generating technologies available. While they are operating, PV systems produce no air pollution, hazardous waste, or noise, and they require no transportable fuels. In PV system design, the selection and proper installation of appropriately-sized components directly affect system reliability, lifetime, and initial cost. In this research, we have studied the PWM(Pulse Width Modulation) signals. I proposed an efficient photovoltaic power interface circuit incorporated with a DC-DC converter and a sine-pwm control method full-bridge inverter. In grid-connected solar power systems, the DC-DC converter operates at high switching frequency to make the output current a sine wave, whereas the full-bridge inverter operates at low switching frequency which is determined by the ac frequency. Thus, it can reduce the switching losses incurred by the full-bridge inverter. Full-bridge converter is controlled by using microprocessor control method, and its operation is verified through computer aided simulations.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 하계학술대회 논문집 F
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• pp.1978-1981
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• 1997

This paper describes several PWM method for harmonics reduction in GTO inverter. The analysis and simulations of PWM techniques are carried out. The simulation results demonstrate that the programmed PWM methods(SHE PWM) are superior to the sine-modulated PWM method. The selected harmonic elimination (SHE) PWM scheme which eliminates specific lower order harmonics can generate high quality output waveform in PWM inverter.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2016년도 추계학술대회
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• pp.652-654
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• 2016

본 논문에서는 FPGA를 활용하여 SVPWM (Space Vector Pulse Width Modulation)방식의 정현파 BLDC 모터 구동 로직을 설계 및 구현하였다. Hall sensor를 이용한 BLDC 모터 구동 회로는 정현파 PWM 생성회로, 데드타임 회로 및 리드 앵글 생성 회로 등으로 구성 된다. 특히 PWM 생성 회로는 SVPWM방식을 이용하여 기존 정현파 PWM 대비 선형구간이 15.5% 증가된다. 설계한 회로는 VHDL을 이용하여 모의실험 하였으며 Xilinx Spartan-6 FPGA보드를 통하여 회로의 동작 및 성능을 검증하였다. 검증 결과 모터구동 전류의 THD (Total Harmonic Distortion)은 19.32% 로 기존 정현파 구동 회로 대비 우수한 특성을 보였으며 회전자 분해능은 $1.6^{\circ}$로 정밀 제어가 가능함을 확인하였다.

• 한국조명전기설비학회지:조명전기설비
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• 제1권2호
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• pp.70-73
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• 1987

본 연구에서는 의사사인(Sine) 방식을 사용한 간단한 계단파 PWN을 소개하였다. 제어기의 구성은 기본파 성분인 Sine값을 계단 레벨로 분할하고 각각의 값을 디지탈 합성하여 3상 PWN 인버터를 구성하였다. 3상 출력 펄스는 캐리어 주파수를 일정하게하고 기본파만 변화시켜 낮은 주파수에서 고조파 감소 효과를 얻어냈다. 실험으로는 스위칭 주파수가 20[KHz]일때 0.5마력 유도 전동기 구동을 실행하였다.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 1991년도 추계학술발표회논문집
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• pp.75-79
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• 1991

In this study, a new sinusoidal PWM inverter suitable for use with power MOSFETs is described. The output waveforms in the proposed OWM inverter are investigated both theoretically and experimentally. A modulating signal for the three-phase PWM inverter is obtained by adding 3nth harmonics to the conventional three-phase sine wave. By using the new modulating signal, the amplitude of the fundamental component is increased about 15 percent more than that of a conventional sine wave inverter and the commutation number of the inverter is decreased to two-thirds of a conventional one.

• 한국조명전기설비학회지:조명전기설비
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• 제9권5호
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• pp.51-56
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• 1995

The transistors of single phase 3 level PWM Inverter compose output power transistors and neutral point clamping transistors, which are NPN transistors. Waveforms of driving signals for this are PWM waves for power transistors and period operating waves for neutral point clamping transistors, which signals made W-type modulation from rectangular and sine wave. The output power transistors operate at ON-time complementary and neutral point clamping transistors operate at OFF-time complementary respectively. Therefore, each transistors operate in half period at parallel. Characteristics of this inverter circuit is parallel switching method about series switching method of general inverter. As modulation of 3 level drive signals made from full-wave rectifier of sine wave and rectangular wave, which are level wave about 3 level of complementary transistor inverter. So, this circuit composed complementary operation inverter of NPN transistors only compare with PNP-NPN complementary inverter, which have high power 3 level inverter of complementary operation.

• 조명전기설비학회논문지
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• 제14권5호
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• pp.66-73
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• 2000

본 논문에셔는 3고초파를 주입한 정현파 PWM 인버터의 과변조 영역에서 인버터를 전형적으로 제어하기 위한 새로운 방법을 제시한다. 정현파 PWM에 3고조파를 삽입하면 단순한 정현파 PWM에 비해 선형영역을 확장할 수 있다. 그러나 이 경우에도 선형영역은 six-step 인버터메 비해 90% 정도가 된다. 따라서 과변조 영역에서 변조지수와 인버터 출력의 기본파 전압의 크기에 대한 관계를 분석함으로써, 과변조 영역에서 기준전압올 보정해 줄 수 있다. 보정된 기준 전압을 명령값으로 사용하게 되므로 반복 계산 없이 3고조파 주입형 정현파 PWM에서 출력전압을 SIX-step에샤의 전압에 이로는 과변조 영역까지 선형적으로 제어가 가능하다. 인버터-유도전동기시스템에 대한 시뮬레이션 결과를 통하여 이를 확인하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 하계종합학술대회 논문집
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• pp.515-517
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• 1989

This PWM inverter are used bridge circuit of two pair complementary transistor at each phase. The operation signals are 3 level PWM wave of W type and M type modulation, Which were obtained from switching time data by switching position calculation of triangular and sine wave. The output voltage waveforms of this inverter have the 5 level phase voltage and the 9 level line voltage of PWM.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
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• pp.148-150
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• 1988

The output characteristics of VSI by transistor depend upon bias signal with drive circuit. As the CTI is one of the VSI, takes case PWM output voltage. This Inverter operation is based upon position and negative of sinusoldal PWM signal by carrier triangular wave and compared sine one. Besides, the Inverter operation system required digital signal for microprocessor, sampling method of Inverter driver signals study for get rid of generated signal is error. In the paper, the method of 3 level PWM signal for CTI was studied. This method of signals depend upon caculated switching position of natural sampling with $10^{-6}$ modulation error for time flowchart programs.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 하계학술대회 논문집 B
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• pp.675-677
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• 2000

In the paper the eddy current loss in brushless DC motor due to switching frequency supplied by PWM inverter, is analyzed. The compensated conductivity is used in order to analyze the eddy current loss in brushless DC motor which has lamination structure. The eddy current loss is deceased when switching frequency supplied by PWM inverter is gradually increased from 1.2kHz up to 12kHz. The high switching frequency of PWM inverter make the output wave into a similar sine wave and this leads to the decreasing eddy current loss.