• Transactions on Electrical and Electronic Materials
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• v.10 no.5
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• pp.161-164
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• 2009

Forest fire simulation tests were performed with polymer and porcelain insulators at GOCHANG Power Testing Center. These tests consisted of open flames causing a temperature rise of up to $600{\sim}800^{\circ}C$ measured at the insulator surfaces. Mechanical and electrical characteristics such as the specific mechanical load, the low frequency dry flashover voltage and the impulse flashover voltage were analyzed for the polymer insulators before, during and after the simulation tests and then compared to the porcelain insulators. At the end of the fire simulation tests, there was no detrimental deterioration of any of the insulators. All the insulators passed the KEPCO specification criteria. This study showed that the forest fire simulation had no impact on the polymer insulators.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.609-610
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• 2006

A 77GHz MMIC transceiver module consisting of a power amplifier, a low noise amplifier, a drive amplifier, a frequency doubler and a down-mixer has been developed for automotive forward-looking radar sensor. The MMIC chip set was fabricated using $0.15{\mu}m$ gate-length InGaAs/InAlAs/GaAs mHEMT process based on 4-inch substrate. The power amplifier demonstrated a measured small signal gain of over 20dB from $76{\sim}77GHz$ with 15.5dBm output power. The chip size is $2mm{\times}2mm$. The low noise amplifier achieved a gain of 20dB in a band between $76{\sim}77\;GHz$ with an output power of 10dBm. The chip size is $2.2mm{\times}2mm$. The driver amplifier exhibited a gain of 23dB over a $76{\sim}77\;GHz$ band with an output power of 13dBm. The chip size is $2.1mm{\times}2mm$. The frequency doubler achieved an output power of -16dBm at 76.5GHz with a conversion gain of -16dB for an input power of 10dBm and a 38.25GHz input frequency. The chip size is $1.2mm{\times}1.2mm$. The down-mixer demonstrated a measured conversion gain of over -9dB. The chip size is $1.3mm{\times}1.9mm$. The transceiver module achieved an output power of 10dBm in a band between $76{\sim}77GHz$ with a receiver P1dB of -28dBm. The module size is $8{\times}9.5{\times}2.4mm^3$. This MMIC transceiver module is suitable for the 77GHz automotive radar systems and related applications in W-band.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.648-651
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• 1987

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.13 no.1
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• pp.12-18
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• 2013

Motor imagery classification in electroencephalography (EEG)-based brain-computer interface (BCI) systems is an important research area. To simplify the complexity of the classification, selected power bands and electrode channels have been widely used to extract and select features from raw EEG signals, but there is still a loss in classification accuracy in the state-of- the-art approaches. To solve this problem, we propose a discriminative feature extraction algorithm based on power bands with principle component analysis (PCA). First, the raw EEG signals from the motor cortex area were filtered using a bandpass filter with ${\mu}$ and ${\beta}$ bands. This research considered the power bands within a 0.4 second epoch to select the optimal feature space region. Next, the total feature dimensions were reduced by PCA and transformed into a final feature vector set. The selected features were classified by applying a support vector machine (SVM). The proposed method was compared with a state-of-art power band feature and shown to improve classification accuracy.

• JSTS:Journal of Semiconductor Technology and Science
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• v.7 no.4
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• pp.267-273
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• 2007

A fractional-N frequency synthesizer supports quadruple bands and multiple standards for mobile broadcasting systems. A novel linearized coarse tuned VCO adopting a pseudo-exponential capacitor bank structure is proposed to cover the wide bandwidth of 65%. The proposed technique successfully reduces the variations of KVCO and per-code frequency step by 3.2 and 2.7 times, respectively. For the divider and prescaler circuits, TSPC (true single-phase clock) logic is extensively utilized for high speed operation, low power consumption, and small silicon area. Implemented in $0.18-{\mu}m$ CMOS, the PLL covers $154{\sim}303$ MHz (VHF-III), $462{\sim}911$ MHz (UHF), and $1441{\sim}1887$ MHz (L1, L2) with two VCO's while dissipating 23 mA from 1.8 V supply. The integrated phase noise is 0.598 and 0.812 degree for the integer-N and fractional-N modes, respectively, at 750 MHz output frequency. The in-band noise at 10 kHz offset is -96 dBc/Hz for the integer-N mode and degraded only by 3 dB for the fractional-N mode.

• Transactions of The Korea Fluid Power Systems Society
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• v.4 no.1
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• pp.13-17
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• 2007

The brake gain adaptive wheel slip controller for a vehicle is designed in this paper. The brake gain from braking pressure to braking torque defined by friction coefficient, friction area and effective friction radius is estimated by the adaptive law based on the wheel slip dynamics. And the wheel slip controller is designed based on the estimated brake gain. The robustness of the designed controller is analyzed using Lyapunov function and the convergence of brake gain is verified. Proposed wheel slip controller is verified via CarSim simulation with two kinds of desired wheel slip ratio.

• Journal of ILASS-Korea
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• v.14 no.2
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• pp.65-70
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• 2009

An experimental study was performed to explore the atomization characteristics as the drop formation and the liquid breakup of an ethanol fuel using an electrohydrodynamic atomizer. A developed electrohydrodynamic atomizer controlled by a high AC power, a variable frequency, and a liquid feeding was used for the experiments. The test had been considered a disperse atomization processing at $450{\sim}4200V$ applied power, $200{\sim}400\;Hz$ frequency, and $1{\sim}3\;ml/min$ ethanol feeding to achieve an uniformed droplet formation. The goal of the research was to investigate the possibility of the liquid breakup for an ethanol fuel in an electrohydrodynamic atomizer. The results showed that the mean droplet radius decreased as the applied voltage increased or as the applied AC frequency increased. The whipping motion had been grown at the specified voltages due to the applied frequency.

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.193-194
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• 2007

This paper presents the design of a power amplifier for full-band UWB application systems using a CMOS 0..18um technology. A wideband RLC filter and a multilevel RLC matching scheme are utilized to achieve the wideband input/output matching. Both the cascade and cascode stage are used to increase the gain and to achieve gain flatness. Simulation results show that the designed amplifier provides a power gain greater than 10 dB throughout the UWB full-band(3.1-10.6GHz) and an input P1dB of -1.2dBm at 6.9GHz. It consumes 35.8mW from a 1.8V supply.

• Journal of Satellite, Information and Communications
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• v.12 no.2
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• pp.42-45
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• 2017

It is known that power line communication systems have more noise than general wired communication systems due to the high voltage that flows in power line cables, and the noise causes a serious performance degradation. In order to mitigate performance degradation due to such noise, this paper proposes an artificial intelligence algorithm based on polynomial regression, which detects signals in the impulse noise environment in the power line communication system. The polynomial regression method is used to predict the original transmitted signal from the impulse noise signal. Simulation results show that the signal detection performance in the impulse noise environment of the power line communication is improved through the artificial intelligence algorithm proposed in this paper.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.5 no.2
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• pp.102-107
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• 2005

This paper presents the comparison and performance analysis for CPL and CMOS based designs. We have developed the Verilog-HDL codes for the proposed designs and simulated them using ModelSim for verifying the logical correctness and the timing properties of the proposed designs. The proposed designs are then analyzed at the layout level using LASI. The layouts of the proposed designs are simulated in Winspice for timing and power characteristics. The result shows that the new circuits presented consistently consume less power than the conventional design of the same circuits. It can also be seen that these circuits have the lesser propagation delay and thus higher speed than the conventional designs.