• Title/Summary/Keyword: Silicon-on-silicide

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PA study on selective emitter structure and Ni/Cu plating metallization for high efficiency crystalline silicon solar cells (결정질 실리콘 태양전지의 고효율 화를 위한 Selective emitter 구조 및 Ni/Cu plating 전극 구조 적용에 관한 연구)

  • Kim, Minjeong;Lee, Jaedoo;Lee, Soohong
    • 한국신재생에너지학회:학술대회논문집
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    • 2010.06a
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    • pp.91.2-91.2
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    • 2010
  • The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

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A Study of the Dependence of Effective Schottky Barrier Height in Ni Silicide/n-Si on the Thickness of the Antimony Interlayer for High Performance n-channel MOSFETs

  • Lee, Horyeong;Li, Meng;Oh, Jungwoo;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.1
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    • pp.41-47
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    • 2015
  • In this paper, the effective electron Schottky barrier height (${\Phi}_{Bn}$) of the Ni silicide/n-silicon (100) interface was studied in accordance with different thicknesses of the antimony (Sb) interlayer for high performance n-channel MOSFETs. The Sb interlayers, varying its thickness from 2 nm to 10 nm, were deposited by radio frequency (RF) sputtering on lightly doped n-type Si (100), followed by the in situ deposition of Ni/TiN (15/10 nm). It is found that the sample with a thicker Sb interlayer shows stronger ohmic characteristics than the control sample without the Sb interlayer. These results show that the effective ${\Phi}_{Bn}$ is considerably lowered by the influence of the Sb interlayer. However, the current level difference between Schottky diodes fabricated with Sb/Ni/TiN (8/15/10 nm) and Sb/Ni/TiN (10/15/10 nm) structures is almost same. Therefore, considering the process time and cost, it can be said that the optimal thickness of the Sb interlayer is 8 nm. The effective ${\Phi}_{Bn}$ of 0.076 eV was achieved for the Schottky diode with Sb/Ni/TiN (8/15/10 nm) structure. Therefore, this technology is suitable for high performance n-channel MOSFETs.

GaN epitaxy growth by low temperature HYPE on $CoSi_2$ buffer/Si substrates (실리콘 기판과 $CoSi_2$ 버퍼층 위에 HVPE로 저온에서 형성된 GaN의 에피텍셜 성장 연구)

  • Ha, Jun-Seok;Park, Jong-Sung;Song, Oh-Sung;Yao, T.;Jang, Ji-Ho
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.19 no.4
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    • pp.159-164
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    • 2009
  • We fabricated 40 nm-thick cobalt silicide ($CoSi_2$) as a buffer layer, on p-type Si(100) and Si(111) substrates to investigate the possibility of GaN epitaxial growth on $CoSi_2$/Si substrates. We deposited GaN using a HVPE (hydride vapor phase epitaxy) with two processes of process I ($850^{\circ}C$-12 minutes + $1080^{\circ}C$-30 minutes) and process II ($557^{\circ}C$-5 minutes + $900^{\circ}C$-5 minutes) on $CoSi_2$/Si substrates. An optical microscopy, FE-SEM, AFM, and HR-XRD (high resolution X-ray diffractometer) were employed to determine the GaN epitaxy. In case of process I, it showed no GaN epitaxial growth. However, in process II, it showed that GaN epitaxial growth occurred. Especially, in process II, GaN layer showed selfaligned substrate separation from silicon substrate. Through XRD ${\omega}$-scan of GaN <0002> direction, we confirmed that the combination of cobalt silicide and Si(100) as a buffer and HVPE at low temperature (process II) was helpful for GaN epitaxy growth.

Employing Al Etch Stop Layer for Nb-based SNS Josephson Junction Fabrication Process (Al 식각정지층을 이용한 Nb-based SNS 조셉슨 접합의 제조공정)

  • Choi, J.S.;Park, J.H.;Song, W.;Chong, Y.
    • Progress in Superconductivity
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    • v.12 no.2
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    • pp.114-117
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    • 2011
  • We report our efforts on the development of Nb-based non-hysteretic Josephson junction fabrication process for quantu device applications. By adopting and modifying the existing Nb-aluminum oxide tunnel junction process, we develop a process for non-hysteretic Josephson junction circuits using metal-silicide as metallic barrier material. We use sputter deposition of Nb and $MoSi_2$, PECVD deposition of silicon oxide as insulator material, and ICP-RIE for metal and oxide etch. The advantage of the metal-silicide barrier in the Nb junction process is that it can be etched in $SF_6$ RIE together with Nb electrode. In order to define a junction area precisely and uniformly, end-point detection for the RIE process is critical. In this paper, we employed thin Al layer for the etch stop, and optimized the etch condition. We have successfully demonstrated that the etch stop properties of the inserted Al layer give a uniform etch profile and a precise thickness control of the base electrode in Nb trilayer junctions.

Microstructural investigation of the electroplating Cu thin films for ULSI application (ULSI용 Electroplating Cu 박막의 미세조직 연구)

  • 박윤창;송세안;윤중림;김영욱
    • Journal of the Korean Vacuum Society
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    • v.9 no.3
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    • pp.267-272
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    • 2000
  • Electroplating Cu was deposited on Si(100) wafer after seed Cu was deposited by sputtering first. TaN was deposited as a diffusion barrier before depositing the seed Cu. Electroplating Cu thin films show highly (111)-oriented microstructure for both before and after annealing at $450^{\circ}C$ for 30min and no copper silicide was detected in the same samples, which indicates that TaN barrier layer blocks well the Cu diffusion into silicon substrate. After annealing the electroplating Cu film up to $450^{\circ}C$, the Cu film became columnar from non-columnar, its grain size became larger about two times, and also defects density of stacking faults, twins and dislocations decreased greatly. Thus the heat treatment will improve significantly electromigration property caused by the grain boundary in the Cu thin films.

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Joining of Silicon Nitride to Carbon Steel using an Active Metal Alloys (활성 납재를 이용한 질화규소/탄소강 접합)

  • Choe, Yeong-Min;Jeong, Byeong-Hun;Lee, Jae-Do
    • Korean Journal of Materials Research
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    • v.9 no.2
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    • pp.199-204
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    • 1999
  • As the engine design change to get high efficiency and performance of commercial diesel engine, surface wear of the cam follower becomes an important issues as applied load increasing at the contact face between cam follower and cam. Purpose of this study is the developing of the ceramic cam follower made of silicon nitride ceramic which is more wear resistant than the cast iron and sintered cam follower. Ceramic cam follower was made by direct brazing of thin ceramic disk to steel can follower body using active bracing alloy. Effect of joining condition on the interfacial phases and joining strength wer examined at bvarious joining temperatures, times, and cooling rates. Crowning resulted from the difference of thermal expansion coefficient after direct brazing without using any stress-relieving inter layer was measured. Interfacial phases are mainly titanium silicide and titanium nitride which are the products between active metal(Ti) in brazing alloy and silicon nitiride. Maximum joining strength of the ceramic metal joint, measured by DBS method, was 334MPa. Crowning(R) of the prototype ceramic cam follower was 1595mm. As machining for crowning is not necessary, production cost can be reduced.

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Low-cost Contact formation of High-Efficiency Crystalline Silicon Solar Cells by Plating

  • Kim D. S.;Lee E. J.;Kim J.;Lee S. H.
    • New & Renewable Energy
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    • v.1 no.1 s.1
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    • pp.37-43
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    • 2005
  • High-efficiency silicon solar cells have potential applications on mobile electronics and electrical vehicles. The fabrication processes of the high efficiency cells necessitate com placated fabrication precesses and expensive materials. Ti/Pd/Ag metal contact has been used only for limited area In spite of good stability and low contact resistance because of Its expensive material cost and precesses. Screen printed contact formed by Ag paste causes a low fill factor and a high shading loss of commercial solar cells because of high contact resistance and a low aspect ratio. Low cost Ni/Cu metal contact has been formed by using a low cost electroless and electroplating. Nickel silicide formation at the interface enhances stability and reduces the contact resistance resulting In an energy conversion efficiency of $20.2\%\;on\;0.50{\Omega}cm$ FZ wafer. Tapered contact structure has been applied to large area solar cells with $6.7\times6.7cm^2$ in order to reduce power losses by the front contact The tapered front metal contact Is easily formed by the electroplating technique producing $45cm^2$ solar cells with an efficiency of $21.4\%$ on $21.4\%\;on\;2{\Omega}cm$ FZ wafer.

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The Enhancement of Thermal Stability of Nickel Monosilicide by Ir and Co Insertion (Ir과 Co를 첨가한 니켈모노실리사이드의 고온 안정화 연구)

  • Yoon, Ki-Jeong;Song, Oh-Sung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.7 no.6
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    • pp.1056-1063
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    • 2006
  • Thermal evaporated 10 nm-Ni/l nm-Ir/(or polycrystalline)p-Si(100) and 10 nm-$Ni_{50}Co_{50}$/(or polycrystalline)p-Si(100) films were thermally annealed using rapid thermal annealing fur 40 sec at $300{\sim}1200^{\circ}C$. The annealed bilayer structure developed into Ni(Ir or Co)Si and resulting changes in sheet resistance, microstructure, phase and composition were investigated using a four-point probe, a scanning electron microscopy, a field ion beam, an X-ray diffractometer and an Auger electron spectroscope. The final thickness of Ir- and Co-inserted nickel silicides on single crystal silicon was approximately 20$\sim$40 nm and maintained its sheet resistance below 20 $\Omega$/sq. after the silicidation annealing at $1000^{\circ}C$. The ones on polysilicon had thickness of 20$\sim$55 nm and remained low resistance up to $850^{\circ}C$. A possible reason fur the improved thermal stability of the silicides formed on single crystal silicon substrate is the role of Ir and Co in preventing $NiSi_2$ transformation. Ir and Co also improved thermal stability of silicides formed on polysilicon substrate, but this enhancement was lessened due to the formation of high resistant phases and also a result of silicon mixing during high temperature diffusion. Ir-inserted nickel silicides showed surface roughness below 3 nm, which is appropriate for nano process. In conclusion, the proposed Ir- and Co- inserted nickel silicides may be superior over the conventional nickel monosilicides due to improved thermal stability.

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The Research of Solar Cells Applying Ni/Cu/Ag Contact for Low Cost & High Efficiency (태양전지의 저가격.고효율화를 위한 Ni/Cu/Ag 전극에 관한 연구)

  • Cho, Kyeong-Yeon;Lee, Ji-Hun;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.06a
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    • pp.444-445
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    • 2009
  • The metallic contact system of silicon solar cell must have several properties, such as low contact resistance, easy application and good adhesion. Ni is shown to be a suitable barrier to Cu diffusion as well as desirable contact metal to silicon. Nickel monosilicide(NiSi) has been suggested as a suitable silicide due to its lower resistivity, lower sintering temperature and lower layer stress than $TiSi_2$. Copper and Silver can be plated by electro & light-induced plating method. Light-induced plating makes use the photovoltaic effect of solar cell to deposit the metal on the front contact. The cell is immersed into the electrolytic plating bath and irradiated at the front side by light source, which leads to a current density in the front side grid. Electroless plated Ni/ Electro&light-induced plated Cu/ Light-induced plated Ag contact solar cells result in an energy conversion efficiency of 16.446 % on $0.2\sim0.6\;{\Omega}{\cdot}cm$, $20\;\times\;20\;mm^2$, CZ(Czochralski) wafer.

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Schottky barrier polycrystalline silicon thin film transistor by using platinum-silicided source and drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터트랜지스터)

  • Shin, Jin-Wook;Choi, Chel-Jong;Chung, Hong-Bay;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.80-81
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    • 2008
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

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