• 통합자연과학논문집
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• 제3권3호
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• pp.138-142
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• 2010

Polystyrene thin films containing Bragg structures have been successfully obtained by the removal of DBR porous silicon films from the DBR structured porous silicon/polystyrene composite film in HF/$H_2O$ mixture solution and by replicating the nano-structures of porous silicon containing Bragg structure. Polystyrene thin films containing Bragg structures displayed unique optical reflection resonances in optical reflection spectrum. This optical reflection band was resulted from the interference of reflection wavelength at Bragg structure of polystyrene thin films. The wavelength of reflection resonances could be modified by the change of Bragg structure of the master. Polystyrene thin films containing Bragg structures were flexible and maintained their optical characteristics upon bending. The Polystyrene thin films replicate the photonic features and the nanostructure of the master.

• 반도체디스플레이기술학회지
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• 제2권4호
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• pp.31-35
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• 2003

We present a formation technique of thin film heater for heat transfer components. Thin film structures of Cr-Si have been prepared on top of alumina substrates by magnetron sputtering. More samples of Mo thin films were prepared on silicon oxide and silicon nitride substrates by electron beam evaporation technology. The electrical properties of the thin film structures were measured up to the temperature of $500^{\circ}C$. The thickness of the thin films was ranged to about 1 um, and a post annealing up to $900^{\circ}C$ was carried out to achieve more reliable film structures. In measurements of temperature coefficient of resistance (TCR), chrome-rich films show the metallic properties; whereas silicon-rich films do the semiconductor properties. Optimal composition between Cr and Si was obtained as 1 : 2, and there is 20% change or less of surface resistance from room temperature to $500^{\circ}C$. Scanning electron microscopy (SEM) and Auger electron spectroscopy (AES) were used for the material analysis of the thin films.

• 한국세라믹학회지
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• 제46권1호
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• pp.10-15
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• 2009

We have fabricated silicon-rich silica thin films via RF magnetron sputtering using a SiO target. Thickness evolution and microstructure change of such $SiO_x$ (1$SiO_x$ thin films turned out to be mainly responsible for the increase of refractive index.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2007년도 춘계학술대회B
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• pp.2453-2458
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• 2007

The performance of polysilicon thin film transistor (p-Si TFT) has an important role in the operation of active matrix liquid crystal displays. To fabricate the p-Si TFTs that have uniform characteristics, understanding of the recrystallization mechanism of silicon is crucial. Especially, the analysis of the transient temperature variation and the liquid-solid interface motion is required to find the mechanism. The thermal conductivity is one of the most important parameters to understand the mechanism. In this work, a KrF eximer laser beam was irradiated to amorphous silicon thin films. We measured the transient reflectivity at the wavelength of 633 nm. We carried out the numerical simulation of one dimension conduction equation so that we determined the most well-fitted thermal conductivity by comparing the numerically obtained transient reflectivity with the experimentally measured one. The experimentally determined thermal conductivity of amorphous silicon thin films is 1.5 W/mK.

• 한국세라믹학회지
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• 제35권5호
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• pp.486-492
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• 1998

Silicon carbide (SiC) thin films were deposited on the porous silicon substrates by chemical vapour de-position(CVD) using MTS as a source material. The deposited films were ${\beta}$-SiC with poor crystallity con-firmed by XRD measurement. It was considered that the films showed the mixed characteistics of cry-stalline and amorphous SiC where amorphous SiC where amorphous SiC played a role of buffer layer in interface between as-dep films and Si substrate. The buffer layer reduced lattice mismatch to some extent the generally occurs when SiC films are deposited on Si. The low temperature (10K) PL (phtoluminescence) studies showed two broad bands with peaks at 600 and 720 for the films deposited at 1100$^{\circ}C$ The maximum PL peak of the crystalline SiC was observed at 600 nm and the amrophous SiC of 720 nm was also confirmed. PL peak due the amorphous SiC was smaller than that of the crystalline SiC, PL of porous Si might be disapperared due to densification during heat treatment.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.52-52
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• 2011

A novel deposition process for n-type nanocrystalline silicon (n-type nc-Si) thin films at room temperature has been developed by adopting the neutral beam assisted chemical vapor deposition (NBa-CVD). During formation of n-type nc-Si thin film by the NBa-CVD process with silicon reflector electrode at room temperature, the energetic particles could induce enhance doping efficiency and crystalline phase in polymorphous-Si thin films without additional heating on substrate; The dark conductivity and substrate temperature of P-doped polymorphous~nano crystalline silicon thin films increased with increasing the reflector bias. The NB energy heating substrate(but lower than $80^{\circ}C$ and increase doping efficiency. This low temperature processed doped nano-crystalline can address key problem in applications from flexible display backplane thin film transistor to flexible solar cell.

• 한국표면공학회지
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• 제25권6호
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• pp.287-292
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• 1992

Silicon nitride thin film (SiNx) was deposited onto the 3inch silicon wafer using an electron cyclotron resonance (ECR) plasma apparatus. The thin films which were deposited by changing the SiH4N2 gas flow rate ratio at 1.5mTorr without substrate heating were analyzed through the x-ray photo spectroscopy (XPS) and ellipsometer measurements, etc. Silicon nitride thin films prepared by the electron cyclotron resonance plasma chemical vapor deposition method at low substrate temperature (<10$0^{\circ}C$) exhibited excellent physical and electrical properties. The very uniform and good quality silicon nitride thin films were obtained. The characteristics of electron cyclotron resonance plasma were inferred from the analyzed results of the deposited films.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.42-45
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• 1992

The poly silicon thin films were prepared by solid phase crystallization at 600$^{\circ}C$ of amorphous silicon films deposited on Corning 7059 glass and (100) silicon wafer with thermally grown SiO$_2$substrate by plasma enhanced chemical vapor deposition with varying rf power, deposition temperature, total flow rate. Crystallization time, microstructure, absorption coefficients were investigated by RAMAN, XRD analysis and UV transmittance measurement. Crystallization time of amorphous silicon films was increased with increasing rf power, decreasing deposition temperature and decreasing total flow rate.

• 전자공학회논문지A
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• 제32A권1호
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• pp.179-184
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• 1995

Phosphorous was deped in silicon thin films by Ion Mass Doping and Changes in the electrical resistance with respect tko heat treatments were investigated. SOI(Silicon On Insulator) thin films which contain few grain boundaries prepared by ZMR(Zone Melting Recrystallization) of polysilicon films, polysilicon films which have about 1500 $A^{\rarw}$ of grain size prepared by LPCVD at 625.deg. C, and amorphous silicon thin films prepared by LPCVD at low temperature were used as substrates and thermal behavior of phosphorous after RTA(Rapid Thermal Annealing) and furnace annealing was carefully studied. Amorphous thin films showed about 10$^{6}$ .OMEGA./ㅁbefore any heat treatment, while polycrystalline and SOI films about 10$^{3}$.OMEGA./¤. All these films, however, showed about 10.OMEGA./ㅁafter furnace annealing at 700.deg. C for 3hrs and RTA showed about the same trend. Films with grain boundaries showed a certain range of heat treatment which rendered increase of the electrical resistance upon annealing, which could not be observed in amorphous films and segregation of doped phosphorous by diffusion with annealing was thought to be responsible for this abnormal behavior.