• The Korean Journal of Ceramics
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• 제4권3호
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• pp.222-226
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• 1998

$Cu_3N$ film deposited on silicon oxide substrate by r.f. reactive sputtering technique. Synthesis and properties of copper nitride film were investigated for its possible application to Cu metallization as adhesive interlayer between copper and $SiO_2. Cu_3N$ film was synthesized at the substrate temperature ranging from $100^{\circ}C$ to $200^{\circ}C$ and at nitrogen gas ratio above $X_{N2}=0.4. Cu_3N, CuN_x$, and FGM-structured $Cu/CuN_x$ films prepared in this work passed Scotch-tape test and showed improved adhesion property to silicon oxide substrate compared with Cu film. Electrical resistivity of copper nitride film had a dependency on its lattice constant and was ranged from 10-7 to 10-1 $\Omega$cm. Copper nitride film was, however, unstable when it was annealed at the temperature above $400^{\circ}C$.

• 전자공학회논문지A
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• 제30A권1호
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• pp.44-50
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• 1993

In an attempt to improve the electrical characteristics of tantalum pentoxide dielectric film, silicon substrate was reacted with a nitrogen plasma to form a silicon nitride of 50.angs. and then tantalum pentoxide thin films were formed by reactive sputtering in the same chamber. Breakdown field and leakage current density were measured to be 2.9 MV/cm and 9${\times}10^{8}\;A/cm^{2}$ respectively in these films whose thickness was about 180.angs.. With annealing at rectangular waveguides with a slant grid are investigated here. In particular, 900.deg. C in oxygen ambient for 100 minutes, breakdown field and leakage current density were improved to be 4.8 MV/cm and 1.61.6${\times}10^{8}\;A/cm^{2}$ respectively. It turned out that the electrical characteristics could also be improved by oxygen plasma post-treatment and the conduction mechanism at high electric field proved to be Schottky emission in these double-layered films.

• 한국컴퓨터산업교육학회:학술대회논문집
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• 한국컴퓨터산업교육학회 2003년도 제4회 종합학술대회 논문집
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• pp.79-82
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• 2003

The electrothermal simulation of high voltage LIGBT(Lateral Insulated Gate Bipolar Transistor) in thin Silicon on insulator (SOI) and Silicon on sapphire (SOS) for thermal conductivity and sink is performed by means of MEDICI. The finite element simulations demonstrate that the thermal conductivity of the buried oxide is an important parameter for the modeling of the thermal behavior of silicon-on-insulator (SOI) devices. In this paper, using for SOI LIGBT, we simulated electrothermal for device that insulator layer with $SiO_2$ and $Al_2O_3$ at before and after latch up to measured the thermal conductivity and temperature distribution of whole device and verified that SOI LIGBT with $Al_2O_3$ insulator had good thermal conductivity and reliability.

• 한국표면공학회지
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• 제29권6호
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• pp.760-765
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• 1996

Silicon oxide thin films are prepared by plasma-enhanced CVD (PECVD) using 100kHz and 13.56MHz generators. Source gases are two sorts of mixture, tetramethoxysilane (TMOS) and oxygen, and tetramethylsilane (TMS) and oxygen. We investigate the effect of frequency on film properties of deposited films including mechanical properties. 100kHz PECVD process can deposit silicon oxide films at $23^{\circ}C$ at the power of 20W. X-ray photoelectron spectroscopy (XPS), infrared spectroscopy (IR) and ellipsometric measurements reveal that the structural quality of the films prepared both by 100kHz process and by 13.56MHz process are very like silicon dioxide. The 100kHz process is adequate for low temperature deposition of SiOx films.

• KSTLE International Journal
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• 제9권1_2호
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• pp.10-12
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• 2008

Silicon micro-patterns were fabricated on Si (100) wafers using photolithography and DRIE (Deep Reactive Ion Etching) fabrication techniques. The patterned shapes included micro-pillars and micro-channels. After the fabrication of the patterns, the patterned surfaces were chemically modified by coating Z-DOL (perfluoropolyether, PFPE) thin films. The surfaces were then evaluated for their micro-friction behavior in comparison with those of bare Si (100) flat, Z-DOL coated Si (100) flat and uncoated Si patterns. Experimental results showed that the chemically treated (Z-DOL coated) patterned surfaces exhibited the lowest values of coefficient of friction when compared to the rest of the test materials. The results indicate that a combination of both the topographical and chemical modification is very effective in reducing the friction property. Combined surface treatments such as these could be useful for tribological applications in miniaturized devices such as Micro/Nano-Electro-Mechanical-Systems (MEMS/NEMS).

• 한국신재생에너지학회:학술대회논문집
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• 한국신재생에너지학회 2009년도 추계학술대회 논문집
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• pp.346-346
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• 2009

For high efficiency hetero junction solar cell over 20%, good silicon wafer passivation is one of the most important technological factor. Compared to the conventional PECVD technique, HWCVD has appeared as an promising alternative for high quality passivation layer formation. In this work, HWCVD passivation layer characteristics have been intensively investigated on wafer surface treatment, Hydrogen density in deposited thin layer and thermal effects in deposition process. Comprehensive results of the individual process factors on interface passivation has been discussed and resultant silicon hetero junction solar cell characteristics has been investigated.

• 한국진공학회지
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• 제1권1호
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• pp.183-189
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• 1992

텅스텐 실리사이드를 축적전극으로 하는 얇은 N/O(SiO2/Si3N4) 구조막의 특성을 다 결성 실리콘의 경우와 비교 평가하였다. 누설전류 및 항복전압이 향상되었고 축적용량은 감 소하였다. 용량 감소의 원인중의 하나는 텅스텐 실리사이드 상의 산화막 성장률이 다결성 실리콘 위에서 보다 빠른 것이고 둘째는 열처리에 따라 다결정 실리콘 내 도판트 불순물이 텅스텐 실리사이드를 통하여 외향확산하여 다결정 실리콘 내에 공핍층을 형성하게 되고 공 핍층 용량으로 인하여 축적용량이 감소하게 된다.

• 한국표면공학회지
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• 제35권4호
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• pp.211-217
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• 2002

Ti-Si-N films were deposited onto WC-Co substrate by a RF-PECVD technique. The deposition behaviors of Ti-Si-N films were investigated by varying the deposition temperature, RF power, and reaction gas ratio (Mx). Ti-Si-N films deposited at 500, 180W, and Mx 60% had a maximum hardness value of 38GPa. The microstructure of films with a maximum hardness was revealed to be a nanocomposite of TiN crystallites penetrated by amorphous silicon nitride phase by HRTEM analyses. The microstructure of maximum hardness with Si content (10 at.%) was revealed to be a nanocomposite of TiN crystallites penetrated by amorphous silicon nitride phase, but to have partly aligned structure of TiN and some inhomogeniety in distribution. and At above 10 at.% Si content, TiN crystallite became finer and more isotropic also thickness of amorphous silicon nitride phase increased at microstructure.

• E2M - 전기 전자와 첨단 소재
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• 제10권8호
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• pp.794-799
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• 1997

Poly-Si films have been prepared by solid phase crystallization of LPCVD(low-pressure CVD) amorphous silicon. The crystallinity of poly-Si films has been derived from UV reflectance spectrum and lies in the range between 70% and 80% . From XRD measurement the peak at 28.2$^{\circ}$from (111) plane is dominantly detected in the SPC poly-Si films, The average grain size of poly-Si film is determined by the image of SEM and varies from 4000 $\AA$ to 8000$\AA$. The electrical conductivity of as-deposited amorphous silicon film is about 2.5$\times$10$^{-7}$ ($\Omega$.cm)$^{-1}$ , and 3~4$\times$10$^{-6}$ ($\Omega$.cm)$^{-1}$ of room temperature conductivity is the SPC poly-Si films. The conductivity activation energies are 0.5~0.6 eV or the 500$\AA$-thick poly-Si films.

• The Korean Journal of Ceramics
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• 제3권3호
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• pp.177-181
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• 1997

Epitaxial films of cubic silicon carbide (3C-SiC, $\beta$-SiC) have been grown on Si(001) and Si(111) substrates by high vacuum chemical vapor deposition using the single precursor 1,3-disilabutane, $H_3SiCH_2SiH_2CH_3$, at temperatures 900~$100^{\circ}C$. The advantage of using the single precursor over the covnentional chemical vapor deposition is evident in that the source chemical is safe to handle, carbonization of the substrates is not necessary, accurate stoichiometry of the silicon carbide films is easily achieved, and the deposition temperature is much lowered. The films were characterized by XPS, XRD, SEM, RHEED, RBS, AES, and TED.