• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.178-178
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• 2010

With the scaling down of ULSI(Ultra Large Scale Integration) circuit of CMOS(Complementary Metal Oxide Semiconductor)based electronic devices, the electronic devices become more faster and smaller size that are promising field of semiconductor market. However, very narrow line width has some disadvantages. For example, because of narrow line width, deposition of conformal and thin barrier is difficult. Besides, proportion of barrier width is large, thus resistance is high. Conventional PVD(Physical Vapor Deposition) thin films are not able to gain a good quality and conformal layer. Hence, in order to get over these side effects, deposition of thin layer used of ALD(Atomic Layer Deposition) is important factor. Furthermore, it is essential that copper atomic diffusion into dielectric layer such as silicon oxide and hafnium oxide. If copper line is not surrounded by diffusion barrier, it cause the leakage current and devices degradation. There are some possible methods for improving the these secondary effects. In this study, TaNx, is used of Tertiarybutylimido tris (ethylamethlamino) tantalum (TBITEMAT), was deposited on the 24nm sized trench silicon oxide/silicon bi-layer substrate with good step coverage and high quality film using plasma enhanced atomic layer deposition (PEALD). And then copper was deposited on TaNx barrier using same deposition method. The thickness of TaNx was 4~5 nm. TaNx film was deposited the condition of under $300^{\circ}C$ and copper deposition temperature was under $120^{\circ}C$, and feeding time of TaNx and copper were 5 seconds and 5 seconds, relatively. Purge time of TaNx and copper films were 10 seconds and 6 seconds, relatively. XRD, TEM, AFM, I-V measurement(for testing leakage current and stability) were used to analyze this work. With this work, thin barrier layer(4~5nm) with deposited PEALD has good step coverage and good thermal stability. So the barrier properties of PEALD TaNx film are desirable for copper interconnection.

• Current Photovoltaic Research
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• v.2 no.3
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• pp.103-109
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• 2014

Highly efficient hydrogenated nanocrystalline silicon (nc-Si:H) thin-film solar cells were prepared on flexible stainless steel substrates using plasma-enhanced chemical vapor deposition. To enhance the performance of solar cells, material properties of back reflectors, n-doped seed layers and wide bandgap nc-SiC:H window layers were optimized. The light scattering efficiency of Ag back reflectors was improved by increasing the surface roughness of the films deposited at elevated substrate temperatures. Using the n-doped seed layers with high crystallinity, the initial crystal growth of intrinsic nc-Si:H absorber layers was improved, resulting in the elimination of the defect-dense amorphous regions at the n/i interfaces. The nc-SiC:H window layers with high bandgap over 2.2 eV were deposited under high hydrogen dilution conditions. The vertical current flow of the films was enhanced by the formation of Si nanocrystallites in the amorphous SiC:H matrix. Under optimized conditions, a high conversion efficiency of 9.13% ($V_{oc}=0.52$, $J_{sc}=25.45mA/cm^2$, FF = 0.69) was achieved for the flexible nc-Si:H thin-film solar cells.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.4
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• pp.161-168
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• 2001

Organic thin film transitors(TFTs) are of interest for use in broad area electronic applications. For example, in active matrix liquid crystal displays(AMLCDs), organic TFTs would allow the use of inexpensive, light-weight, flexible, and mechanically rugged plastic substrates as an alternative to the glass substrates needed for commonly used hydrogenated amorphous silicon(a-Si:H). Recently pentacene TFTs with carrier field effect, mobility as large as 2 $cm^2V^{-1}s^{-1}$ have been reported for TFTs fabricated on silicon substrates, and it is higher than that of a-Si:H. But these TFTs are fabricated on silicon wafer and $SiO_2$ was used as a gate insulator. $SiO_2$ deposition process requires a high insulator which is polyimide and photo acryl. We investigated trasfer and output characteristics of the thin film transistors having active layer of pentacene. We calculated field effect mobility and on/off ratio from transfer characteristics of pentacene thin film transistor, and measured IR absorption spectrum of polymide used as the gate dielectric layer. It was found that using the photo acryl as a gate insulator, threshold voltage decreased from -12.5 V to -7 V, field effect mobility increased from 0.012 $cm^2V^{-1}s^{-1}$ to 0.039 $cm^2V^{-1}s^{-1}$ , and on/off current ratio increased from $10^5\;to\;10^6$. It seems that TFTs using photo acryl gate insulator is apt to form channel than TFTs using polyimide gate insulator.

• Korean Journal of Materials Research
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• v.14 no.7
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• pp.477-481
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• 2004

High quality polycrystalline silicon is very critical part of the high quality thin film transistor(TFT) for display devices. Metal induced lateral crystallization(MILC) is one of the most successful technologies to crystallize the amorphous silicon at low temperature(below $550^{\circ}C$) and uses conventional and large glass substrate. In this study, we observed that the MILC behavior changed with abrupt variation of the amorphous silicon active pattern width. We explained these phenomena with the novel MILC mechanism model. The 10 nm thick Ni layers were deposited on the glass substrate having various amorphous silicon patterns. Then, we annealed the sample at $550^{\circ}C$ with rapid thermal annealing(RTA) apparatus and measured the crystallized length by optical microscope. When MILC progress from narrow-width-area(the width was $w_2$) to wide-width-area(the width was $w_1$), the MILC rate decreased dramatically and was not changed for several hours(incubation time). Also the incubation time increased as the ratio, $w_1/w_2$, get larger. We can explain these phenomena with the tensile stress that was caused by volume shrinkage due to the phase transformation from amorphous silicon to crystalline silicon.

• Journal of the Korean Vacuum Society
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• v.8 no.3B
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• pp.322-326
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• 1999

We have investigated the growing process of a silicon film on the $CeO_2/Si$ surface. The silicon was deposited by using electron beam deposition method. The $CeO_2$(111) film was grown on a (111)-oriented silicon substrate at $700^{\circ}C$ at oxygen [partial pressure of $5\times10^{-5}$ Torr. To investigate the condition of epitaxial growth of si films on the $CeO_2/Si$ substrate, we deposited Si at various temperature니 The overlayer silicon was characterized by using x-ray diffraction(XRD). double crystal x-ray diffraction (DCXRD), and transmission electron microscopy (TEM). At temperature higher than $690^{\circ}C$, $CeO_2$ layer was observed at the $CeO_2/Si$ interface, which was formed by chemical reaction with silicon and oxygen dissociated from $CeO_2$. When silicon was deposited on the $CeO_2/Si$ at $620^{\circ}C$, silicon grew epitaxially along the (111)-direction.

• Journal of the Korean Vacuum Society
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• v.13 no.3
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• pp.114-119
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• 2004

Silicon Nitride thin films were deposited on p-type Si (100) substrates by atomic layer deposition (ALD) method at $550^{\circ}C$ using alternating exposures of $SiH_2Cl_2$ and $NH_3$, and the physical and electrical propeties of the deposited films were characterized. The thickness of the films was linearly increased with the number of deposition cycles, and the growth rate of the films was 0.13 nm/cycle with the reactant exposures of $3.0\times10^{9}$ L. The silicon nitride thin films deposited by Alf exhibited similar physical properties with the silicon nitride thin films deposited by low-pressure chemical vapor deposition (LPCVD) method in terms of refractive index and wet etch rate, lowering deposition temperature by more than 200 $^{\circ}C$. The ALD films showed the leakage current density of 0.79 nA/$\textrm{cm}^2$ at 3 MV/cm, which is lower than 6.95 nA/$\textrm{cm}^2$ of the LPCVD films under the same condition.

• Journal of the Korean Society for Precision Engineering
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• v.20 no.4
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• pp.143-150
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• 2003

Frictional properties of ultra-thin carbon coatings on silicon wafer were investigated based on Taguchi experimental design method. Sensitivity analysis was performed with normal load, relative humidity, deposition process, and coating thickness as the variables. It was found that despite low thickness, the carbon coating resulted in relatively low friction coefficient. Also, the frictional behavior was affected significantly by humidity and normal load.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.1538-1541
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• 2009

Amphiphobic thin films for touched panel application was prepared by $SiO_2$ nanoparticles self-assembled nanostructure. Silicon dioxide nano spheres were prepared by sol-gel method and well dispersed in a solution with surfacants of low surface energy. Nanostrcture thin films were obtained by spin coating technologies.

• Journal of the Korean Chemical Society
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• v.38 no.7
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• pp.473-479
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• 1994

Tungsten thin film was deposited on p-(100) silicon substrate by using the LPCVD(low pressure chemical vapor deposition) technique. $WF_6$ was used as a source gas for tungsten and $SiH_4$ was used as a reducing gas for $WF_6$. Tungsten thin film was deposited by either SiH4 or Si substrate reduction of $WF_6$ under cold-wall condition and it was deposited by $SiH_4$ reduction of $WF_6$ under hot-wall condition. The crystal structure of deposited thin film under both conditions were identified to be bcc (body centered cubic). The physical and electrical properties of deposited thin films were investigated. The deposited film under hot-wall condition changed to $WSi_2$ film by the annealing under $800^{\circ}C.$ From the experimental results and theoretical considerations, the change of the crystal structure of the thin film by annealing was discussed. $WSi_2$ thin film, which was known to have good compatibility with Si substrate, could be produced under hot-wall condition although the film properties were superior under cold-wall condition.

• Current Photovoltaic Research
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• v.1 no.1
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• pp.11-16
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• 2013

The current solar cell industry is experiencing a temporary plateau due to a sluggish economy and oversupply. It is expected that the solar industry can see similar growth to that of the recent past by overcoming the current situation, as there is growing demand globally for solar energy. The current situation led to restructuring of the world's solar industry, and domestic firms will need to have competitiveness through strategic approaches and proprietary technology to survive in the global solar market. Crystalline and amorphous silicon based solar cells have led the solar industry and occupied half or more of the market thus far. They will do so in the future PV market as well by playing a pivotal role in the solar industry. In this paper, the current status and prospects of silicon based solar cells, from materials to comprehensive and high efficiency technology that can emerge in the future, are discussed.