• Journal of the Korean Vacuum Society
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• v.20 no.5
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• pp.374-380
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• 2011

Carbon coils could be synthesized on nickel catalyst layer-deposited silicon oxide substrate using $C_2H_2$ and $H_2$ as source gases and $SF_6$ as an additive gas under thermal chemical vapor deposition system. The characteristics (formation density and morphology) of as-grown carbon coils according to the injection stage of $SF_6$ gas incorporation were investigated. A continuous injecting of $SF_6$ gas flow could give rise to many types of carbon coils-related geometries, namely linear tub, micro-sized coil, nano-sized coil, and wave-like nano-sized coil. However, the limitation of the geometry as the nano-sized geometries of carbon coils could be achieved by the incorporation of $SF_6$ in a short time (1 min) during the initial deposition stage. A delayed injection of a short time $SF_6$ gas flow can deteriorate the limitation of the geometries. It confirms that the injection time and its starting point of $SF_6$ gas flow would be very important to determine the geometries of carbon coils.

• Current Photovoltaic Research
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• v.2 no.4
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• pp.147-151
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• 2014

A boron doping process using a boron tri-bromide ($BBr_3$) as a boron source was applied to form a $p^+$ emitter layer on an n-type mono-crystalline CZ substrate. Nitrogen ($N_2$) gas as an additive of the diffusion process was varied in order to study the variations in sheet resistance and the uniformity of doped layer. The flow rate of $N_2$ gas flow was changed in the range 3 slm~10 slm. The sheet resistance uniformity however was found to be variable with the variation of the $N_2$ flow rate. The optimal flow rate for $N_2$ gas was found to be 4 slm, resulting in a sheet resistance value of $50{\Omega}/sq$ and having a uniformity of less than 10%. The process temperature was also varied in order to study its influence on the sheet resistance and minority carrier lifetimes. A higher lifetime value of $1727.72{\mu}s$ was achieved for the emitter having $51.74{\Omega}/sq$ sheet resistances. The thickness of the boron rich layer (BRL) was found to increase with the increase in the process temperature and a decrease in the sheet resistance was observed with the increase in the process temperature. Furthermore, a passivated emitter solar cell (PESC) type solar cell structure comprised of a boron doped emitter and phosphorus doped back surface field (BSF) having Ni/Cu contacts yielding 15.32% efficiency is fabricated.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1673-1681
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• 2015

A low dropout (LDO) regulator with a wide-bandwidth is proposed in this paper. The regulator features a Human Body Model (HBM) 8kV-class high robustness ElectroStatic Discharge (ESD) protection circuit, and two error amplifiers (one with low gain and wide bandwidth, and the other with high gain and narrow bandwidth). The dual error amplifiers are located within the feedback loop of the LDO regulator, and they selectively amplify the signal according to its ripples. The proposed LDO regulator is more efficient in its regulation process because of its selective amplification according to frequency and bandwidth. Furthermore, the proposed regulator has the same gain as a conventional LDO at 62 dB with a 130 kHz-wide bandwidth, which is approximately 3.5 times that of a conventional LDO. The proposed device presents a fast response with improved load and line regulation characteristics. In addition, to prevent an increase in the area of the circuit, a body-driven fabrication technique was used for the error amplifier and the pass transistor. The proposed LDO regulator has an input voltage range of 2.5 V to 4.5 V, and it provides a load current of 100 mA in an output voltage range of 1.2 V to 4.1 V. In addition, to prevent damage in the Integrated Circuit (IC) as a result of static electricity, the reliability of IC was improved by embedding a self-produced 8 kV-class (Chip level) ESD protection circuit of a P-substrate-Triggered Silicon Controlled Rectifier (PTSCR) type with high robustness characteristics.

• Journal of Electrical Engineering and information Science
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• v.3 no.2
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• pp.239-244
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• 1998

Piezoelectric pressure sensors and pyroelectric infrared detectors based on ZnO thin film have been integrated with GaAs metal-semiconductor field effect transistor (MESFET) amplifiers. Surface micromachining techniques have been applied in a GaAs MESFET process to form both microsensors and electronic circuits. The on-chip integration of microsensors such as pressure sensors and infrared detectors with GaAs integrated circuits is attractive because of the higher operating temperature up to 200 oC for GaAs devices compared to 125 oC for silicon devices and radiation hardness for infrared imaging applications. The microsensors incorporate a 1${\mu}$m-thick sputtered ZnO capacitor supported by a 2${\mu}$m-thick aluminum membrane formed on a semi-insulating GaAs substrate. The piezoelectric pressure sensor of an area 80${\times}$80 ${\mu}$m2 designed for use as a miniature microphone exhibits 2.99${\mu}$V/${\mu}$ bar sensitivity at 400Hz. The voltage responsivity and the detectivity of a single infrared detector of an area 80${\times}$80 $\mu\textrm{m}$2 is 700 V/W and 6${\times}$108cm$.$ Hz/W at 10Hz respectively, and the time constant of the sensor with the amplifying circuit is 53 ms. Circuits using 4${\mu}$m-gate GaAs MESFETs are fabricated in planar, direct ion-implanted process. The measured transconductance of a 4${\mu}$m-gate GaAs MESFET is 25.6 mS/mm and 12.4 mS/mm at 27 oC and 200oC, respectively. A differential amplifier whose voltage gain in 33.7 dB using 4${\mu}$m gate GaAs MESFETs is fabricated for high selectivity to the physical variable being sensed.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.3.1-3.1
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• 2011

Over the past decade, the major efforts for lowering the cost of electronics has been devoted to increasing the packaging efficiency of the integrated circuits (ICs), which is defined by the ratio of all devices on system-level board compared to the area of the board, and to working on a larger but cheaper substrates. Especially, in flexible electronics, the latter has been the favorable way along with using novel nanomaterials that have excellent mechanical flexibility and electrical properties as active channel materials and conductive films. Here, the tool for achieving large area patterning is by printing methods. Although diverse printing methods have been investigated to produce highly-aligned structures of the nanomaterials with desired patterns, many require laborious processes that need to be further optimized for practical applications, showing a clear limit to the design of the nanomaterial patterns in a large scale assembly. Here, we demonstrate the alignment of highly ordered and dense silicon (Si) NW arrays to anisotropically etched micro-engraved structures using a simple evaporation process. During evaporation, entropic attraction combined with the internal flow of the NW solution induced the alignment of NWs at the corners of pre-defined structures. The assembly characteristics of the NWs were highly dependent on the polarity of the NW solutions. After complete evaporation, the aligned NW arrays were subsequently transferred onto a flexible substrate with 95% selectivity using a direct gravure printing technique. As proof-of-concept, flexible back-gated NW field effect transistors (FETs) were fabricated. The fabricated FETs had an effective hole mobility of 0.17 $cm2/V{\cdot}s$ and an on/off ratio of ${\sim}1.4{\times}104$. These results demonstrate that our NW gravure printing technique is a simple and effective method that can be used to fabricate high-performance flexible electronics based on inorganic materials.

• Korean Journal of Materials Research
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• v.21 no.4
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• pp.236-241
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• 2011

Polysilazane and silazane-based precursor films were deposited on stacked TiN/Ti/TEOS/Si-substrate by spin-coating, then annealed at $150{\sim}400^{\circ}C$, integrated further to form the top electrode and pad, and finally characterized. The precursor solutions were composed of 20% perhydro-polysilazane ($SiH_2NH$)n, and 20% hydropolymethyl silazane ($SiHCH_3NH$)n in dibutyl ether. Annealing of the precursor films led to the compositional change of the two chemicals into silicon (di)oxides, which was confirmed by Fourier transform infrared spectroscopy (FTIR) spectra. It is thought that the different results that were obtained originated from the fact that the two precursors, despite having the same synthetic route and annealing conditions, had different chemical properties. Electrical measurement indicated that under 0.6MV/cm, a larger capacitance of $2.776{\times}10^{-11}$ F and a lower leakage current of 0.4 pA were obtained from the polysilazane-based dielectric films, as compared to $9.457{\times}10^{-12}$ F and 2.4 pA from the silazane-based film, thus producing a higher dielectric constant of 5.48 compared to 3.96. FTIR indicated that these superior electrical properties are directly correlated to the amount of Si-O bonds and the improved chemical bonding structures of the spin-on dielectric films, which were derived from a precursor without C. The chemical properties of the precursor films affected both the formation and the electrical properties of the spin-on dielectric film.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.21 no.4
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• pp.153-157
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• 2011

We have investigated the effect of inductively coupled plasma (ICP) treatment on the early growth stage of heteroepitaxial Ge layers grown on Si(100) substrates using low pressure chemical vapor deposition (LPCVD), The Si(100) substrates were treated by ICP process with various source and bias powers, followed by the Ge deposition, The ICP treatment led to the enhancement in the coalescence of Ge islands, The growth rate of Ge on Si(100) with ICP surface treatment is about 5 times higher than that without ICP surface treatment. A missing dimer caused by the ICP surface treatment can act as a nucleation site for Ge adatoms, which could be responsible for the improvement in growth behavior of Ge on Si(100) substrates.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.5
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• pp.153-160
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• 2010

We optimized the Si(substrate)/$SiO_2$(cladding)/$Si_3N_4$(antiresonant cladding)/$SiO_2$(core)/air multi-layers rib-optical waveguides of antiresonant reflecting optical waveguide (ARROW) for integrated optical biosensor structure utilizing beam propagation method (BPM). Thickness of anti-resonant cladding was derived to minimize the propagation loss and leaky field mode deeply related with evanescent mode was theoretically derived. Depth, width, refractive index and cladding thickness of anti-resonant cladding were numerically calculated into 2.3${\mu}m$, 5${\mu}m$, 1.488, and 0.11${\mu}m$ respectively to minimize propagation loss using the BPM simulation tool. Finally one- and two-dimensional propagation characteristics of ARROW was confirmed.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.9
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• pp.1641-1647
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• 2006

A dual micro gas sensor way for detecting reducing gas and bad order was fabricated using nano sized $SnO_2$ thin film fabrication method. To make nano-sized thin gas sensitive $SnO_2$ thin rilm, thin tin metal layer $2500{\AA}$ thick was oxidized between 600 and $800^{\circ}C$ by thermal oxidation. The gas sensing layers such as $SnO_2,\;SnO_2(+Pt)\;and\;SnO_2(+CuO)$ were patterned by metal shadow mask for simple fabrication process on the silicon substrate. The micro gas sensors with $SnO_2(Pt)$ and $SnO_2(+CuO)$ showed good selectivity to CO gas among reducing gases and good sensitivity to $H_2S$ that is main component of bad odor, separately.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.2
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• pp.185-193
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• 1996

$2.5^{\circ}\;and\;5^{\circ}$ tilted (100) Si wafer were oxidized in dry oxygen, and the differences in thermal oxidation behavior and oxidation induced stacking faults (OSF) between specimens were investigated. Ellipsometer measurements of the oxide thickness produced by oxidation in dry oxygen from 900 to $1200^{\circ}C$ showed that the oxidation rates of the tilted (100) Si were more rapid than those of the (100) Si and the differences between them decreased as the oxidation temperature increased. The activation energies based on the parabolic rate constant, B for (100) Si, $2.5^{\circ}$ off (100) Si and $5^{\circ}$ off (100) Si were 27.3, 25.9, 27.6 kcal/mol and those on the linear rate constant, B/A were 58.6, 56.6, 57.6 kcal/mol, respectively. Also, considerable decrease in the density of oxidation induced stacking faults for the $5^{\circ}$ off (100) Si was observed through optical microscopy after preferentially etching off the oxide layer, and the angle of stacking faults were changed with tilted angles.