• 한국전기전자재료학회논문지
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• 제25권1호
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• pp.58-61
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• 2012

In our report a relatively simple process for fast nano-texturing of p-type(100) CZ- silicon surface using silver catalyzed wet chemical etching in aqueous hydrofluoric acid (HF) and hydrogen peroxide solution($H_2O_2$) at room temperature. The wafers were saw-damaged by NaOH(6 wt%) at $60^{\circ}C$ for 150s. To obtain a nano-structured black surface, a thin layer of silver with thickness of 1 - 10 nm was deposited on the surfaces by evaporation system. After this process the samples were etched in HF : $H_2O_2$ : $H_2O$ = 1:5:10 at room temperature for 80s - 220s. Due to the local catalytic of the Ag clusters, this treatment results in the nano-scale texturing on the surface. This resulted in average reflectance values less than 9% after the silver on the surface of the wafers were removed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1995년도 추계학술대회 논문집 학회본부
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• pp.326-328
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• 1995

SiC buffer layers were grown on Si(100) substrates by ultra-high-vacuum electron cryclotron resonance plasma (UHV ECR plasma) from $CH_4/H_2$ mixture at 700$^{\circ}C$. The electron densities and temperature were measured by single probe. The axial plasma potentials measured by emissive probe had the double layer structure at positive substrate bias. Piranha cleaning was carried out as ex-situ wet cleaning. Clean and smooth silicon surface were prepared by in-situ hydrogen plasma cleaning at 540$^{\circ}C$. A short exposure to hydrogen plasma transforms the Si surface from 1$\times$1 to 2$\times$1 reconstruction. It was monitored by reflection high energy electron diffraction (RHEED). The defect densities were analysed by the dilute Schimmel etching. The results showed that the substrate bias is important factor in hydrogen plasma cleaning. The low base pressure ($5\times10^{-10}$ torr) restrains the $SiO_2$ growth on silicon surface. The grown layers showed different characteristics at various substrate bias. RHEED and K-ray Photoelectron spectroscopy study showed that grown layer was SiC.

• 한국정밀공학회지
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• 제22권10호
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• pp.195-201
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• 2005

A laterally driven electromagnetic microactuator (LaDEM) is presented, and a micro-optical switch is designed and fabricated as a possible application. LaDEM provides parallel actuation of the microactuator to the silicon substrate surface (in-plane mode) by the Lorentz force. Poly-silicon-on-insulator (Poly-SOI) wafers and a reactive ion etching (RIE) process were used to fabricate high-aspect-ratio vertical microstructures, which allowed the equipment of a vertical micro mirror. A fabricated arch-shaped leaf spring has a thickness of $1.8{\mu}m$, width of $16{\mu}m$, and length of $800{\mu}m$. The resistance of the fabricated structure fer the optical switch was approximately 5$\Omega$. The deflection of the leaf springs increases linearly up to about 400 mA and then it demonstrates a buckling behavior around the current value. Owing to this nonlinear phenomenon, a large displacement of $60{\mu}m$ could be measured at 566 mA. The displacement-load relation and some dynamic characteristics are analyzed using the finite element simulations.

• 대한의용생체공학회:의공학회지
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• 제22권2호
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• pp.145-150
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• 2001

대뇌 피질에 삽입하여 깊이에 따라 신경 신호를 기록하기 위한 탐침형 반도체 미세전극 어레이(depth-type silicon microelectrode array, 일명 SNU probe)를 제작하였다. 붕소를 확산시켜 생성된 고농도 p-type doping된 p＋ 영역을 습식식각 정지점으로 사용하는 기존의 방법과 달리 실리콘 웨이퍼의 앞면을 건식식각하여 원하는 탐침 두께만큼의 깊이로 트렌치(trench)를 형성한 후 뒷면을 습식식각하는 방법으로 탐침 형태의 미세 구조를 만들었다. 제작된 반도체 미세전극 어레이의 탐침 두께는 30 $\mu\textrm{m}$이며 실리콘 건식식각을 위한 마스크로 6 $\mu\textrm{m}$ 두께의 LTO(low temperature oxide)를 사용하였다. 탐침의 두께는 개발된 본 공정을 이용해서 5~90 $\mu\textrm{m}$ 범위까지 쉽게 조절할 수 있었다. 탐침의 두께를 보다 쉽게 조절할 수 있게 됨에 따라 여러 신경조직에 필요한 다양한 구조의 반도체 미세전극 어레이를 개발할 수 있게 되었다. 본 공정을 이용해서 개발된 4채널 SUN probe를 사용하여 흰쥐의 제1차 체감각 피질에서 4채널 신경 신호를 동시에 기록하였으며, 전기적 특성검사에서 기존의 탐침형 반도체 미세전극, 텅스텐 전극과 대등하거나 우수한 신호대 잡음비(signal to noise ratio, SNR)특성을 가짐을 확인하였다.

• 전기학회논문지
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• 제58권5호
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• pp.1004-1009
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• 2009

Recently, mass spectrometers are widely used for in-situ chemical analysis. It has rapid response and high sensitivity. In this paper, we present the fabrication and test of a cold cathode emitter for micro mass spectrometer using CNTs(Carbon nano tubes). The CNTs have good mechanical, electrical and chemical characteristics. So they have a long life time and strong robustness. The micro mass spectrometer is composed of the glass substrate and the silicon substrate. The glass substrate is constructed by electrodes for TOF(Time-of-flight) which analyze an ion with mass to charge ratio as ion separator. The silicon substrate is highly doped wafer which is patterned for gate electrode and then 100 11m dry etching to grow the CNTs as the electron emitter. The CNTs are grown by HFCVD(Hot filament chemical vapor deposition) with sputtering the catalyst. We successfully attained to grow the CNTs and to test the characteristics.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.1971-1973
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• 2005

We fabricated an alumina membrane with nano-sized pore array by anodic oxidation using the thin film aluminum deposited on silicon wafer. It is important that the sample prepared by metal deposition method has a flat aluminum surface and a good adhesion between the silicon wafer and the thin film aluminum. The oxidation time was controlled by observation of current variation. The nano-sized pores with diameter of $60{\sim}120nm$ was obtained by $40{\sim}80$ voltage. The pore widening process was employed for obtaining the flat surface because the pores of the alumina membrane prepared by the fixed voltage method shows the structure of rough surface. Finally, the sample was immersed to the phosphoric acid with 0.1M concentration to etching the barrier layer. The sample will be applied to electronic sensors, field emission display, and template for nano- structure.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.120-122
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• 2005

An alumina membrane with nano-sized pore array by anodic oxidation using thin film aluminum deposited on silicon wafer was fabricated. It is important that the sample prepared by metal deposition method has a flat aluminum surface and a good adhesion between the silicon wafer and the thin film aluminum. The oxidation time was controlled by observation of current variation. While the oxalic acid with 0.2M was used for low voltage anodization under 100V, the chromic acid with 0.1M was used for high voltage anodization over 100V. The nano-sized pores with diameter of 60~120nm was obtained by low voltage anodization of 40~90V and those of 200~300nm was obtained by high voltage anodization of 120~160V. Finally, the sample was immersed to the phosphoric acid with 0.1M concentration to etching the barrier layer. The sample will be applied to electronic sensors, field emission display, and template for nano-structure.

• 대한화장품학회지
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• 제34권4호
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• pp.269-274
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• 2008

본 연구를 통해 반도체 산업에서 유래된 마이크로웨이브 증폭 에칭기술(MEE)을 이용하여, 마이카의 표면 구조를 변화시키고 오일 흡유량을 조절할 수 있었다. 마이크로웨이브 에너지가 마이카에 조사되면, 마이카 표면이 몇 분 이내에 에칭이 된다. 에칭의 결과로 마이카의 오일 흡유량이 증가되고, 마이카 $SiO_2$층의 표면 변화에 의해 백색도가 증가한다. 추가적으로, 땀을 흡수한 이후에도 높은 백색도가 유지된다. 마이카의 표면구조의 변화는 불산에 슬러리화된 마이카에 마이크로웨이브 조사를 통해서 이루어졌다. 에칭의 정도는 산의 농도, 조사 시간, 조사 에너지의 양, 슬러리의 농도에 의해 조절되었다. 에칭된 마이카의 표면 구조는 '달' 표면 모양과 유사하게 보인다. 표면적과 거칠기 등의 특성은 Brunauer-Emmett-Teller (BET), atomic force microscopy (AFM), scanning electron microscopy (SEM), Spectrophotometer, goniophometer로 측정되었다.

• 한국재료학회지
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• 제8권7호
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• pp.634-640
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• 1998

HBr을 이용한 트렌치 식각시 식각 방지막의 형성과 이들이 결함 생성 및 분포에 미치는 영향을 고분해능 투과전자현미경을 이용하여 연구하였다. $O_2$ 및 다른 첨가 가스로 $SiO_xF_y$, $SiO_xBr_y$ 등의 식각 방지막을 표면에 형성시켜 벽면 undercut을 방지하고 표면의 거칠기를 감소할 수 있었으며, 이후의 트렌치 채움 공정에서 void 가 없는 잘 채원진 구조를 얻을 수 있었다. 형성된 식각 방지막은 격자 결함의 생성 및 이들의 분포에 영향을 미쳤다. 대부분의 식각 유도 결함들은 트렌치 바닥의 가장자리에서 $10\AA$ 이내의 깊이로 분포하였으며, 잔류막의 두께에 의존하였다. 두꺼운 잔류막층 아래로는 결함들이 거의 사라졌으며, 결함층의 깊이와 잔류막 두께는 대체로 반비례하는 것을 나타났다. 기판 내에 존재하는 결정학적인 결함들은 식각종의 입사각이나 에너지에 의존하는 반면에,식각된 표면에서 관찰되는 결함들은 트렌치 식각동안 형성되는 이러한 잔류막의 두께에 크게 의존하는 것으로 나타났다.

• 한국재료학회지
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• 제21권5호
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• pp.243-249
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• 2011

To reduce manufacturing costs of crystalline silicon solar cells, silicon wafers have become thinner. In relation to this, the properties of the aluminium-back surface field (Al-BSF) are considered an important factor in solar cell performance. Generally, screen-printing and a rapid thermal process (RTP) are utilized together to form the Al-BSF. This study evaluates Al-BSF formation on a (111) textured back surface compared with a (100) flat back surface with variation of ramp up rates from 18 to $89^{\circ}C$/s for the RTP annealing conditions. To make different back surface morphologies, one side texturing using a silicon nitride film and double side texturing were carried out. After aluminium screen-printing, Al-BSF formed according to the RTP annealing conditions. A metal etching process in hydrochloric acid solution was carried out to assess the quality of Al-BSF. Saturation currents were calculated by using quasi-steady-state photoconductance. The surface morphologies observed by scanning electron microscopy and a non-contacting optical profiler. Also, sheet resistances and bulk carrier concentration were measured by a 4-point probe and hall measurement system. From the results, a faster ramp up during Al-BSF formation yielded better quality than a slower ramp up process due to temperature uniformity of silicon and the aluminium surface. Also, in the Al-BSF formation process, the (111) textured back surface is significantly affected by the ramp up rates compared with the (100) flat back surface.