• Journal of Integrative Natural Science
• /
• v.5 no.4
• /
• pp.211-215
• /
• 2012

Single-crystalline silicon nanowire arrays (SiNWAs) using electroless metal-assisted etchings of p-type silicon were successfully fabricated. Ag nanoparticle deposition on silicon wafers in HF solution acted as a localized micro-electrochemical redox reaction process in which both anodic and cathodic process took place simultaneously at the silicon surface to give SiNWAs. The growth effect of SiNWs was investigated by changing of etching times. The morphologies of SiNWAs were obtained by SEM observation. Well-aligned nanowire arrays perpendicular to the surface of the silicon substrate were produced. Optical characteristics of SiNWs were measured by FT-IR spectroscopy and indicated that the surface of SiNWs are terminated with hydrogen. The thicknesses and lengths of SiNWs are typically 150-250 nm and 2 to 5 microns, respectively.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.24 no.1
• /
• pp.91-96
• /
• 1987

Plasma etching can obtain less damaged etch surface than reactive ion etching. This study was performed to get anisotropic etching characteristics of Si using two step etching technique with C2CIF5 and SF6 gas mixture. The results show that the etch rate and aspect ratio of silicon was increased with increment of SF6 contents. The bulging phenomenon on trench side wall in the plasma one-step etching technique was eliminated by the two step etching technique. The anisotropy was decreased from 12(at 120m Torr) to 2.2(at 400m Torr) with increasing the chamber pressure. At the low rf power (350 watts) anisotrpy of silicon was obtained 7 lower than that of high rf power (650 watts. A:~9). In Summary we obtained anisotropic etching profiles of silicon with e 6\ulcornerm depth by using the plasma two-step etching technique.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.419-419
• /
• 2016

High efficiency silicon solar cell requires the textured front surface to reduce reflectance and to improve the light trapping. In case of mono-crystalline silicon solar cell, wet etching with alkaline solution is widespread. However, the alkali texturing methods are ineffective in case of multi-crystalline silicon wafer due to grain boundary of random crystallographic orientation. The acid texturing method is generally used in multi-crystalline silicon wafer to reduce the surface reflectance. However the acid textured solar cell gives low short-circuit current due to high reflectivity while it improves the open-circuit voltage. To reduce the reflectivity of multi-crystalline silicon wafer, double texturing method with combination of acid and reactive ion etching is an attractive technical solution. In this paper, we have studied to optimize RIE experimental condition with change of RF power (100W, 150W, 200W, 250W, 300W). During experiment, the gas ratio of SF6 and O2 was fixed as 30:10.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.86-86
• /
• 2012

The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

• The Transactions of the Korean Institute of Electrical Engineers C
• /
• v.49 no.6
• /
• pp.367-374
• /
• 2000

This paper presents a method to fabricate freestanding structures by (100) silicon anisotropic etching and nickel electroless plating. The electroless plating process is simpler than the electroplating, and provides good coating uniformity and improved mechanical properties. Furthermore, the (100) silicon anisotropic etching in KOH solution with being aligned to <100> direction provides vertical (100) sidewalls on etched (100) surface. In this paper, the effects of the nickel electroless plating condition on the properties of electroless plated metal structures are investigated to apply fabrication of micro structures and then various micro structures are fabricated by nickel electroless plating. And then, the structures are released by silicon anisotropic etching in KOH solution with a large gap between the structure and the substrate. The fabricated cantilever structures are $210\mum$. wide, $5\mum$. thick and $15\mum$. over the silicon substrate, and the comb structure has the comb electrodes which are $4\mum$. wide and $4.3\mum$. thick separated by$1\mum$. It is released by silicon anisotropic etching in KOH solution. The gap between the structure and the substrate is $2.5\mum$.

• Journal of Information Display
• /
• v.2 no.4
• /
• pp.1-7
• /
• 2001

This paper investigates the characteristics of a newly developed high density hollow cathode plasma(HCP) system and its application for the etching of silicon wafers. We used $SF_6$ and $O_2$ gases in the HCP dry etch process. This paper demonstrates very high plasma density of $2{\times}10^{12}cm^{-3}$ at a discharge current of 20 rna, Silicon etch rate of 1.3 ${\mu}m$/min was achieved with $SF_6/O_2$ plasma conditions of total gas pressure of 50 mTorr, gas flow rate of 40 seem, and RF power of200W. This paper presents surface etching characteristics on a crystalline silicon wafer and large area cast type multicrystlline silicon wafer. We obtained field emitter tips size of less than 0.1 ${\mu}m$ without any photomask step as well as with a conventional photolithography. Our experimental results can be applied to various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications. In this research, we studied silicon etching properties by using the hollow cathode plasma system.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.299.2-299.2
• /
• 2013

We investigated the potassium remaining on a crystalline silicon solar cell after potassium hydroxide (KOH) etching and its effect on the lifetime of the solar cell. KOH etching is generally used to remove the saw damage caused by cutting a Si ingot; it can also be used to etch the rear side of a textured crystalline silicon solar cell before atomic layer-deposited Al2O3 growth. However, the potassium remaining after KOH etching is known to be detrimental to the efficiency of Si solar cells. In this study, we etched a crystalline silicon solar cell in three ways in order to determine the effect of the potassium remnant on the efficiency of Si solar cells. After KOH etching, KOH and tetramethylammonium hydroxide (TMAH) were used to etch the rear side of a crystalline silicon solar cell. To passivate the rear side, an Al2O3 layer was deposited by atomic layer deposition (ALD). After ALD Al2O3 growth on the KOH-etched Si surface, we measured the lifetime of the solar cell by quasi steady-state photoconductance (QSSPC, Sinton WCT-120) to analyze how effectively the Al2O3 layer passivated the interface of the Al2O3 layer and the Si surface. Secondary ion mass spectroscopy (SIMS) was also used to measure how much potassium remained on the surface of the Si wafer and at the interface of the Al2O3 layer and the Si surface after KOH etching and wet cleaning.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2008.11a
• /
• pp.418-418
• /
• 2008

The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

• Proceedings of the IEEK Conference
• /
• 2000.06b
• /
• pp.68-71
• /
• 2000

In this paper, we have measured the oxygen contents by FTIR in silicon wafer various process technology(slicing, lapping, polishing). The measured data are also compared with the data of etching process(KOH, Bright etching). Also we have measured the surface morpology in backside silicon wafer after etching treatment and etch pit density due to OISF after 4 step high temperature annealing process with optical microscope.

• Journal of the Korean Vacuum Society
• /
• v.11 no.4
• /
• pp.249-255
• /
• 2002

For a formation of membrane structures, single crystal silicon wafers have been anisotropically etched with solutions of KOH and KOH-IPA. The etching rate was observed to be strongly dependent upon the etchant temperature and concentration. Mask patterns for the etching experiment was aligned to incline $45^{\circ}$on the primary flat of the silicon wafer. The different etching characteristics were observed according to pattern directions and etchant concentration. When the KOH concentration was fixed to 20 wt%, the U-groove etching shape was observed for the etching temperature of above $80^{\circ}C$, and V-groove shapes observed at below $80^{\circ}C$. Hillocks, which were generated at the etched silicon surfaces, has been decreased as the increasing of the etchant temperature and concentration.