• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2005.11a
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• pp.175-176
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• 2005

• Journal of Integrative Natural Science
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• v.10 no.2
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• pp.65-73
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• 2017

In this review paper, we will discuss about the methods of synthesizing Si nanowires by Top-down and Bottom-up. Silicon nanowires have a lot of application on various fields such as Li ion batteries, solar cells, chemical and biological sensors. We will address some of the applications of silicon Nanowires.

• Korean Journal of Materials Research
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• v.10 no.6
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• pp.450-455
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• 2000

For further scaling down of the silicon devices, the application of low dielectric constant materials instead of silicon oxide has been considered to reduce power consumption, crosstalk, and interconnection delay. In this paper, the effect of $O_2/SF_6$ plasma chemistry on the etching characteristics of polyimide-one of the promising low-k interlayer dielectrics-has been studied. The etch rate of polyimide decreases with the addition of $SF_6$ gas due to formation of nonvolatile fluorine compounds inhibiting reaction between oxygen and hydrocarbon polymer, while applying substrate bias enhances etching process through physical attack. However, addition of small amount of $SF_6$ is desirable for etching topography. $SiO_2$ hard mask for polyimide etching is effective under $O_2$plasma etching(selectivity~30), while $O_2/SF_6$ chemistry degrades etching selectivity down to 4. Based on the above results, $1-2\mu\textrm{m}$ L&S PI2610 patterns were successfully etched.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.5
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• pp.396-401
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• 1999

In this study, $Ar^+$ ion laser etching process of single/poly-crystalline Si with $CCl_2F_2$ gas is investigated for MEMS applications. In general, laser direct etching process is useful in microelectronic process, fabrication of micro sensors and actuators, rapid prototyping, and complementary processing because of the advantages of 3D micromachining, local etching/deposition process, and maskless process with high resolution. In this study, a pyrolytic method, in which $CCl_2F_2$ gasetches molten Si by the focused laser, was used. In order to analyze the temperature profile of Si by the focused laser, the 3D heat conduction equation was analytically solved. In order to investigate the process parameters dependence of etching characteristics, laser power, $CCl_2F_2$ gas pressure, and scanning speed were varied and the experimental results were observed by SEM. The aspect ratio was measured in multiple scanning and the simple 3D structure was fabricated. In addition, the etching characteristics of $6\mum$ thick poly-crystalline Si on the insulator was investigated to obtain flat bottom and vertical side wall for MEMS applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.2
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• pp.156-161
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• 2011

The present study introduces a novel wet etching technique for nanostructure fabrications which usually requires low surface roughness. Using the current method, acquired profiles were smooth even in the nanoscale, which cannot be easily achieved with conventional wet or dry etching methods. As one of the most popular single crystal silicon etchant, potassium hydroxide (KOH) solution was used as a base solvent and two additives, antimony trioxide (Sb2O3) and ethyl alcohol were employed in. Four experimental parameters, concentrations of KOH, Sb2O3, and ethyl alcohol and temperature were optimized at 60 wt.%, 0.003 wt.%, 10 v/v%, and $23^{\circ}C$, respectively. Effects of additives in KOH solution were investigated on the profiles in both (110) and (111) planes of single crystal silicon wafer. The preliminary results show that additives play a critical role to decrease etch rate significantly down to ~2 nm/min resulting in smooth side wall profiles on (111) plane and enhanced surface roughness.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.08a
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• pp.132-132
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• 2010

In the nano-scale Si processing, patterning processes based on multilevel resist structures becoming more critical due to continuously decreasing resist thickness and feature size. In particular, highly selective etching of the first dielectric layer with resist patterns are great importance. In this work, process window for the infinitely high etch selectivity of silicon oxynitride (SiON) layers and silicon nitride (Si3N4) with EUV resist was investigated during etching of SiON/EUV resist and Si3N4/EUV resist in a CH2F2/N2/Ar dual-frequency superimposed capacitive coupled plasma (DFS-CCP) by varying the process parameters, such as the CH2F2 and N2 flow ratio and low-frequency source power (PLF). It was found that the CH2F2/N2 flow ratio was found to play a critical role in determining the process window for ultra high etch selectivity, due to the differences in change of the degree of polymerization on SiON, Si3N4, and EUV resist. Control of N2 flow ratio gave the possibility of obtaining the ultra high etch selectivity by keeping the steady-state hydrofluorocarbon layer thickness thin on the SiON and Si3N4 surface due to effective formation of HCN etch by-products and, in turn, in continuous SiON and Si3N4 etching, while the hydrofluorocarbon layer is deposited on the EUV resist surface.

• Journal of the Semiconductor & Display Technology
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• v.14 no.3
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• pp.7-11
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• 2015

In order to protect the patterned mask from contamination during lithography process, pellicle has become a critical component for Extreme Ultraviolet (EUV) lithography technology. According to EUV pellicle requirements, the pellicle should have high EUV transmittance and robust mechanical property. In this study, silicon nitride, which is well-known for its remarkable mechanical property, was used as a pellicle membrane material to achieve high EUV transmittance. Since long silicon wet etching process time aggravates notching effect causing stress concentration on the edge or corner of etched structure, the remaining membrane is prone to fracture at the end of etch process. To overcome this notching effect and attain high transmittance, we began preparing a rather thick (200 nm) $SiN_x$ membrane which can be stably manufactured and was thinned into 43 nm thickness with HF wet etching process. The measured EUV transmittance shows similar values to the simulated result. Therefore, the result shows possibilities of HF thinning processes for $SiN_x$ EUV pellicle fabrication.

• Transactions of Materials Processing
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• v.12 no.7
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• pp.640-646
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• 2003

The nanoprobe based on lithography, mainly represented by SPM based technologies, has been recognized as potential application to fabricate the surface nanostructures because of its operational versatility and simplicity. The objective of the work is to suggest new mastless pattern fabrication technique using the combination of machining by nanoindenter and KOH wet etching. The scratch option of the nanoindenter is a very promising method for obtaining nanometer scale features on a large size specimen because it has a very wide working area and load range. Sample line patterns were machined on a silicon surface, which has a native oxide on it, by constant load scratch (CLS) of the Nanoindenter with a Berkovich diamond tip, and they were etched in KOH solutions to investigate chemical characteristics of the machined silicon surface. After the etching process, the convex structure was made because of masking effect of the affected layer generated by nano-scratch. On the basis of this fact, some line patterns with convex structures were fabricated. Achieved patterns can be used as a mold that will be used for mass production processes such as nanoimprint or PDMS molding process. All morphological data of scratch traces were scanned using atomic force microscope (AFM).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.3
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• pp.337-344
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• 2024

This work focuses on improving the light-harvesting efficiency of thin-film silicon solar cells through innovative multi-architecture surface modifications. To create a regular optical structure, a lithographic process was performed to form it on a glass substrate through various etching processes, from Etch-1 to Etch-3. AZO was deposited on top of the structures and re-etched to create a multi-architectural surface. These surface-modified structures improved the light absorption and overall performance of the solar cell through changes in optical and physical properties, which we will analyze. In addition, we investigated the effect of post-cleaning on the etched glass structures through EDX analysis to understand the mechanism of the etching action. The results of this study are expected to provide important guidelines for the design and fabrication of solar cells and other photovoltaic devices.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.2
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• pp.81-87
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• 1994

We used IR laser inteferometric technique for measuring the temperature of wafer during cryogenic ECR etching. Using this technique, the effect of RF bias power and microwave power on the wafer temperature during etching period is investigated. As the RF bias power and microwave power was increased, the temperature of the wafer considerably increased and we concluded that to prevent the increase of substrate temperature during etching period, an adequate wafer cooling is needed.