• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.871-874
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• 2004

Fabrication of a high-resolution shadow mask, or called nanostencil, is presented. This high-resolution shadowmask is fabricated by a combination of MEMS processes and focused ion beam (FIB) milling. 500 nm thick and 2x2 mm large membranes are made on a silicon wafer by micro-fabrication processes of LPCVD, photolithography, ICP etching and bulk silicon etching. Subsequent FIB milling enabled local membrane thinning and aperture making into the thinned silicon nitride membrane. Due to high resolution of FIB milling process, nanoscale apertures down to 70 nm could be made into the membrane.

• Journal of the Korean Society for Precision Engineering
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• v.28 no.2
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• pp.245-250
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• 2011

A high-resolution shadow mask, a nanostencil, is widely used for high resolution lithography. This high-resolution shadowmask is often fabricated by a combination of MEMS processes and focused ion beam (FIB) milling. In this study, FIB milling on 500-nm-thin SiN membrane was tested and characterized. 500 nm thick and $2{\times}2$ mm large membranes were made on a silicon wafer by micro-fabrication processes of LPCVD, photolithography, ICP etching and bulk silicon etching. A subsequent FIB milling enabled local membrane thinning and aperture making into the thinned silicon nitride membrane. Due to the high resolution of the FIB milling process, nanoscale apertures down to 60 nm could be made into the membrane. The nanostencil could be used for nanoscale patterning by local deposition through the apertures.

• New & Renewable Energy
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• v.5 no.1
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• pp.26-31
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• 2009

The surface etching characteristics of single crystalline silicon wafer were investigated using potassium hydroxide (KOH) and tetramethylammonium hydroxide (TMAH). The saw damage layer was removed after 10min by KOH 45wt% solution at $80^{\circ}C$. The wafer etched at high temperature ($90^{\circ}C$) and in low concentration (4wt%) of TMAH solution showed an increased etch rate of silicon wafer and wavy patterns on the surface. Especially, pyramidal textures were formed in 4wt% TMAH solution without alcohol additives.

• Proceedings of the KIEE Conference
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• 1994.07a
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• pp.72-75
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• 1994

In this paper, a novel method to figure out the relative residual stress distribution along the depth of silicon diaphragms is presented Cantilevers with various thickness are fabricated by the time controlled etching method using EPW as an etchant. The boron concentration along the depth of the cantilevers is obtained by the TSUPREM IV simulation, and the etching time to get the proper thickness is calculated. By measuring deflections of the p+ silicon cantilevers the stress profile along the depth of diaphragm is calculated. The obtained stress profile is reasonable and useful to expect the deflection of cantilevers and the buckling of diaphragms.

• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1430-1432
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• 1997

A solar cell conversion effiency was degraded by grain boundary effect in polycrystalline silicon. To reduce these effects of the grain boundaries, we investigated various influencing factors such as preferential chemical etching of grain boundaries, grid design, transparent conductive thin film, and top metallization along grain boundaries. Pretreatment in $N_2$ atmosphere and gettering by $POCl_3$ and Al were performed to obtain polycrystalline silicon of the reduced defect density. Structural, electrical, and optical properties of solar cells were characterized. Improved conversion efficiencies of solar cell were obtained by a combination of Al diffusion into grain boundaries on rear side, fine grid finger, top Yb metal grid on Cr thin film of $200{\AA}$ and buried contact metallization along grain boundaries.

• Journal of the Semiconductor & Display Technology
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• v.1 no.1
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• pp.9-13
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• 2002

A polyimide-type electrostatic chuck (ESC) was fabricated for the application of holding 8-inch silicon wafers in the oxide etching equipment. For the fabrication of the unipolar ESC, core technologies such as coating of polyimide films and anodizing treatment of aluminum surface were developed. The polyimide films were prepared on top of thin coated copper substrates for the good electrical contacts, and the helium gas cooling technique was used for the temperature uniformity of the silicon wafers. The ESC was essentially working with an unipolar operation, which was easier to fabricate and operate compared to a bipolar operation. The chucking force of the ESC has been measured to be about 580 gf when the applied voltage was 1.5 kV, which was considered to be enough force to hold wafers during the dry etching processing. The employment of the ESC in etcher system could make 8% enhancement of the wafer processing yield.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2005.10a
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• pp.318-321
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• 2005

FIB (Focused ion Beam) milling on a 500-nm-thick silicon nitride membrane was studied in order to fabricate a high-resolution shadow mask, or called a nanostencil. The silicon nitride membrane was fabricated by MEMS processes of LPCVD, photolithography, ICP etching and bulk silicon etching. The apertures made by FIB milling and normal photolithography were compared. The square metal pattern deposited through FIB milled shadow mask showed 6 times smaller comer radius than the case of photolithography. The results show high resolution patterning could be achieved by local deposition through FIB milled shadow-mask.

• Progress in Superconductivity and Cryogenics
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• v.20 no.4
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• pp.20-25
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• 2018

Niobium nitride (NbN) superconducting thin films with the thickness of 100 and 400 nm have been deposited on the surfaces of silicon oxide/silicon substrates using a sputtering method. Their superconducting properties have been evaluated in terms of the transition temperature, critical magnetic field, and critical current density. In addition, the NbN films were patterned in a line with a width of $10{\mu}m$ by a reactive ion etching (RIE) process for their characterization. This study proves the applicability of the standard complementary metal-oxide-semiconductor (CMOS) process in the fabrication of superconducting thin films without considerable degradation of superconducting properties.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.170-170
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• 2013

We present a novel etching technique for 2-dimentional (2-D) hexagonal boron nitride (h-BN) by using capacitively coupled plasma (CCP) of oxygen combined with a post-treatment by de-ionized (DI) water. Oxygen CCP etching process for h-BN has been systematically studied. It is found that a passivation layer was generated to obstruct further etching while it can be easily and radically removed by DI water. An essential cleaning effect also has been observed in the etching process, organic residues are successfully removed and the surface roughness has much decreased. Considering h-BN is the most important 2-D dielectric material and its potential application for graphene to silicon-based electronic devices, such an etching method can be widely used to control the 2-D h-BN thickness and improve the surface quality.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.592-592
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• 2012

태양전지에서 고효율 달성을 위해 태양광을 더 많이 활용하기 위해서는 태양전지 표면에서의 광 반사를 줄여야 하는데 가장 효과적인 방법은 실리콘 기판의 wet etching 공정을 통한 텍스쳐링이다. 태양전지에서 가장 많이 사용되는 파장대역은 가시광선 영역인데 555 nm 파장에서 실리콘 표면의 total reflectance는 30.1%로 매우 높고 diffuse reflectance는 0.1%로서 무시할만큼 적다. 하지만 wet etching을 한 후 total reflectance는 18%까지 감소하였고, diffuse reflectance는 16%까지 증가하였다. 결정면에 따른 식각선택성을 이용하는 이방성 etching으로 V groove 모양의 표면형상을 얻을 수 있었고, 후속 등방성 etching을 하여 U groove 표면형상을 얻을 수 있었다. 또한 wet etching의 문제점중의 하나는 반응중에 생성되는 수소기체가 실리콘 표면에 부착되어 etching이 불균일하게 진행되는 것인데 초음파를 사용하여 이 문제를 해결하였다. 그리고 Etchant의 성분용액중 하나인 IPA의 농도조절을 통해 표면에 형성되는 피라미드의 크기를 조절할 수 있었다. 본 연구에서는 실리콘 표면형상의 각각 서로 다른 크기와 모양에 따라 태양전지를 만들었을 때 빛의 활용 측면에서 어떤 변화가 있고 얼마만큼의 효율변화가 있는지에 대해서도 알아보았다.