• 제목/요약/키워드: Silicon Wet Etching

검색결과 138건 처리시간 0.026초

습식 화학 공정에 의한 태양전지로부터 고순도 실리콘 회수 및 이를 이용한 태양전지 재제조 (Photovoltaic Performance of Crystalline Silicon Recovered from Solar Cell Using Various Chemical Concentrations in a Multi-Stage Process)

  • 노민호;이준규;안영수;여정구;이진석;강기환;조철희
    • 한국재료학회지
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    • 제29권11호
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    • pp.697-702
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    • 2019
  • In this study, using a wet chemical process, we evaluate the effectiveness of different solution concentrations in removing layers from a solar cell, which is necessary for recovery of high-purity silicon. A 4-step wet etching process is applied to a 6-inch back surface field(BSF) solar cell. The metal electrode is removed in the first and second steps of the process, and the anti-reflection coating(ARC) is removed in the third step. In the fourth step, high purity silicon is recovered by simultaneously removing the emitter and the BSF layer from the solar cell. It is confirmed by inductively coupled plasma mass spectroscopy(ICP-MS) and secondary ion mass spectroscopy(SIMS) analyses that the effectiveness of layer removal increases with increasing chemical concentrations. The purity of silicon recovered through the process, using the optimal concentration for each process, is analyzed using inductively coupled plasma atomic emission spectroscopy(ICP-AES). In addition, the silicon wafer is recovered through optimum etching conditions for silicon recovery, and the solar cell is remanufactured using this recovered silicon wafer. The efficiency of the remanufactured solar cell is very similar to that of a commercial wafer-based solar cell, and sufficient for use in the PV industry.

나노/마이크로 PDMS 채널 제작을 위한 마스크리스 실리콘 스템퍼 제작 및 레오로지 성형으로의 응용 (Maskless Fabrication of the Silicon Stamper for PDMS Nano/Micro Channel)

  • 윤성원;강충길
    • 소성∙가공
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    • 제13권4호
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    • pp.326-333
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    • 2004
  • The nanoprobe based on lithography, mainly represented by SPM based technologies, has been recognized as a potential application to fabricate the surface nanosctructures because of its operational versatility and simplicity. However, nanoprobe based on lithography itself is not suitable for mass production because it is time a consuming method and not economical for commercial applications. One solution is to fabricate a mold that will be used for mass production processes such as nanoimprint, PDMS casting, and others. The objective of this study is to fabricate the silicon stamper for PDMS casting process by a mastless fabrication technique using the combination of nano/micro machining by Nanoindenter XP and KOH wet etching. Effect of the Berkovich tip alignment on the deformation was investigated. Grooves were machined on a silicon surface, which has native oxide on it, by constant load scratch (CLS), and they were etched in KOH solutions to investigate chemical characteristics of the machined silicon surface. After the etching process, the convex structures was made because of the etch mask effect of the mechanically affected layer generated by nanoscratch. On the basis of this fact, some line patterns with convex structures were fabricated. Achieved groove and convex structures were used as a stamper for PDMS casting process.

MEMS 공정을 이용한 단결정 실리콘 미세 인장시편과 미세 변형 측정용 알루미늄 Marker의 제조 (Fabrication of Single Crystal Silicon Micro-Tensile Test Specimens and Thin Film Aluminum Markers for Measuring Tensile Strain Using MEMS Processes)

  • 박준식;전창성;박광범;윤대원;이형욱;이낙규;이상목;나경환;최현석
    • 소성∙가공
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    • 제13권3호
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    • pp.285-289
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    • 2004
  • Micro tensile test specimens of thin film single crystal silicon for the most useful structural materials in MEMS (Micro Electro Mechanical System) devices were fabricated using SOI (Silicon-on-Insulator) wafers and MEMS processes. Dimensions of micro tensile test specimens were thickness of $7\mu\textrm{m}$, width of 50~$350\mu\textrm{m}$, and length of 2mm. Top and bottom silicon were etched using by deep RIE (Reactive Ion Etching). Thin film aluminum markers on testing region of specimens with width of $5\mu\textrm{m}$, lengths of 30~$180\mu\textrm{m}$ and thickness of 200 nm for measuring tensile strain were fabricated by aluminum wet etching method. Fabricated side wall angles of aluminum marker were about $45^{\circ}~50^{\circ}$. He-Ne laser with wavelength of 633nm was used for checking fringed patterns.

알카리 금속을 배재한 단결정 실리콘 태양전지의 텍스쳐링 공정 (Alkali metal free texturing for mono-crystalline silicon solar cell)

  • 김태윤;김회창;김범호
    • 한국신재생에너지학회:학술대회논문집
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    • 한국신재생에너지학회 2010년도 추계학술대회 초록집
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    • pp.48.1-48.1
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    • 2010
  • 단결정 실리콘 태양전지 제조 공정이 진행되는 과정에서 각종 오염물에 의해 표면이 오염된다. 태양전지의 효율 개선을 위한 표면 texturing 공정은 주로 wet etch을 주로 사용한다. Wet etch 공정 시 주로 사용되는 KOH 용액은 texturing 후 실리콘 웨이퍼 표면에 K+ 이온을 남기고 이는 태양전지 표면에서의 불순물로 작용하여 효율을 저하시키는 요인이 된다. 이를 제거하기 위해 불산 및 오존에 의한 세정 공정이 추가로 필요로 하게 된다. 이러한 공정을 최소화 하며 잔존하는 알칼리 금속도 제거하기 위해, etchant로 알카리 용액이 아닌 ethylenediamine을 사용하여 texturing 후 KOH 용액과 비교해 보았다.

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Megasonic wave를 이용한 실리콘 이방성 습식 식각의 특성 개선 (The Improved Characteristics of Wet Anisotropic Etching of Si with Megasonic Wave)

  • 제우성;석창길
    • 마이크로전자및패키징학회지
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    • 제11권4호
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    • pp.81-86
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    • 2004
  • 메가소닉파을 이용하여 KOH 용액에서의 실리콘 이방성 습식 식각의 특성들을 개선하기 위한 새로운 방법에 관한 연구를 하였다. P형 6인치 실리콘 웨이퍼를 메가소닉파를 이용한 상태와 이용하지 않은 상태에서 식각 실험을 각각 수행하여 식각 특성들을 비교하였다. 메가소닉파는 식각균일도, 표면 조도 등과 같은 습식 식각의 특성들을 개선시키는 것으로 나타났다. 메가소닉파를 이용했을 때 식각 균일도는 전체 웨이퍼 표면의 ${\pm}1\%$ 이하이며, 메가소닉파를 이용하지 않았을 때는 ${\pm}20\%$이상이다. 식각 공정에 사용한 초기의 실리콘웨이퍼의 제곱 평균 표면 조도($R_{rms}$)는 0.23 nm이다. 자기 진동과 초음파 진동을 이용한 식각에서의 평균 표면 조도는 각각 566 nm, 66 nm로 보고 되었지만, 메가소닉파를 이용하여 $37{\mu}m$ 깊이로 식각한 경우 평균 표면 조도가 1.7nm임을 실험을 통하여 검증하였다. 이러한 결과는 메가소닉파를 이용한 식각 방법이 식각 균일도, 표면 평균 조도 등과 같은 식각 특성들을 개선시키는데 효과적인 방법임을 알 수 있다.

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Multi-crystalline Silicon Solar Cell with Reactive Ion Etching Texturization

  • Park, Seok Gi;Kang, Min Gu;Lee, Jeong In;Song, Hee-eun;Chang, Hyo Sik
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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    • pp.419-419
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    • 2016
  • High efficiency silicon solar cell requires the textured front surface to reduce reflectance and to improve the light trapping. In case of mono-crystalline silicon solar cell, wet etching with alkaline solution is widespread. However, the alkali texturing methods are ineffective in case of multi-crystalline silicon wafer due to grain boundary of random crystallographic orientation. The acid texturing method is generally used in multi-crystalline silicon wafer to reduce the surface reflectance. However the acid textured solar cell gives low short-circuit current due to high reflectivity while it improves the open-circuit voltage. To reduce the reflectivity of multi-crystalline silicon wafer, double texturing method with combination of acid and reactive ion etching is an attractive technical solution. In this paper, we have studied to optimize RIE experimental condition with change of RF power (100W, 150W, 200W, 250W, 300W). During experiment, the gas ratio of SF6 and O2 was fixed as 30:10.

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공정가스와 RF 주파수에 따른 웨이퍼 표면 텍스쳐 처리 공정에서 저반사율에 관한 연구 (Study of Low Reflectance and RF Frequency by Rie Surface Texture Process in Multi Crystall Silicon Solar Cells)

  • 윤명수;현덕환;진법종;최종용;김정식;강형동;이준신;권기청
    • 한국진공학회지
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    • 제19권2호
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    • pp.114-120
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    • 2010
  • 일반적으로 결정질 실리콘 태양전지에서 표면에 텍스쳐링(texturing)하는 것은 알칼리 또는 산성 같은 화학용액을 사용하고 있다. 그러나 실리콘 부족으로 실리콘의 양의 감소로 인하여 웨이퍼 두께가 감소하고 있는 추세에 일반적으로 사용하고 있는 습식 텍스쳐링 방법에서 화학용액에 의한 많은 양의 실리콘이 소모되고 있어 웨이퍼의 파손이 심각한 문제에 직면하고 있다. 그리하여 습식 텍스쳐링 방법보다는 플라즈마로 텍스쳐링할 수 있는 건식 텍스쳐링 방법인 RIE (reactive ion etching) 기법이 대두되고 있다. 그리고 습식 텍스쳐링으로는 결정질 실리콘 태양전지의 반사율을 10% 이하로는 낮출 수가 없다. 다결정 실리콘 웨이퍼 표면에 텍스쳐링을 하기 위하여 125 mm 웨이퍼 144개를 수용할 수 있는 대규모 플라즈마 RIE 장비를 개발하였다. 반사율을 4% 이하로 낮추기 위하여 공정가스는 $Cl_2$, $SF_6$, $O_2$를 기반으로 RIE 텍스쳐링을 하였고 텍스쳐링의 모양은 공정가스, 공정시간, RF 주파수 등에 의해 조절이 가능하였다. 본 연구에서 RIE 공정을 통하여 16.1%의 변환효율을 얻었으며, RF 주파수가 텍스쳐링의 모양에 미치는 영향을 살펴보았다.

Influence of KOH Solution on the Passivation of Al2O3 Grown by Atomic Layer Depostion on Silicon Solar Cell

  • 조영준;장효식
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.299.2-299.2
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    • 2013
  • We investigated the potassium remaining on a crystalline silicon solar cell after potassium hydroxide (KOH) etching and its effect on the lifetime of the solar cell. KOH etching is generally used to remove the saw damage caused by cutting a Si ingot; it can also be used to etch the rear side of a textured crystalline silicon solar cell before atomic layer-deposited Al2O3 growth. However, the potassium remaining after KOH etching is known to be detrimental to the efficiency of Si solar cells. In this study, we etched a crystalline silicon solar cell in three ways in order to determine the effect of the potassium remnant on the efficiency of Si solar cells. After KOH etching, KOH and tetramethylammonium hydroxide (TMAH) were used to etch the rear side of a crystalline silicon solar cell. To passivate the rear side, an Al2O3 layer was deposited by atomic layer deposition (ALD). After ALD Al2O3 growth on the KOH-etched Si surface, we measured the lifetime of the solar cell by quasi steady-state photoconductance (QSSPC, Sinton WCT-120) to analyze how effectively the Al2O3 layer passivated the interface of the Al2O3 layer and the Si surface. Secondary ion mass spectroscopy (SIMS) was also used to measure how much potassium remained on the surface of the Si wafer and at the interface of the Al2O3 layer and the Si surface after KOH etching and wet cleaning.

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Etch Rate of Oxide Grown on Silicon Implanted with Different Ion Implantation Conditions prior to Oxidation

  • Joung, Yang-Hee;Kang, Seong-Jun
    • Journal of information and communication convergence engineering
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    • 제1권2호
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    • pp.67-69
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    • 2003
  • The experimental studies for the etch properties of the oxide grown on silicon substrate, which is in diluted hydrogen fluoride (HF) solution, are presented. Using different ion implantation dosages, dopants and energies, silicon substrate was implanted. The wet etching in diluted HF solution is used as a mean of wafer cleaning at various steps of VLSI processing. It is shown that the wet etch rate of oxide grown on various implanted silicon substrates is a strong function of ion implantation dopants, dosages and energies. This phenomenon has never been reported before. This paper shows that the difference of wet etch rate of oxide by ion implantation conditions is attributed to the kinds and volumes of dopants which was diffused out into $SiO_2$ from implanted silicon during thermal oxidation.