• 전기학회논문지
• /
• 제66권2호
• /
• pp.354-356
• /
• 2017

We focused on light management technology in amorphous silicon solar cells to suppress increase in absorber thickness for improving power conversion efficiency (PCE). $MgF_2$ and $TiO_2$ anti-reflection layers were coated on both sides of Asahi VU ($glass/SnO_2:F$) substrates, which contributed to increase in PCE from 9.16% to 9.81% at absorber thickness of only 150 nm. Also, we applied very thin $MgF_2$ as a rear reflector at n-type nanocrystalline silicon oxide/Ag interface to boost photocurrent. By reinforcing rear reflection, we could find the PCE increase from 10.08% up to 10.34% based on thin absorber about 200 nm.

• Transactions on Electrical and Electronic Materials
• /
• 제1권2호
• /
• pp.1-6
• /
• 2000

This article presents the experiments and considerations possible about gate etching in polysilicon when oxygen gas is added in chamber, We propose the novel study with optical emission spectroscopy in polysilicon etching. It is shown that added oxygen gases play an important role in enhencement of density in chlorine gases as a scavenger of silicon from SiCl$\_$x/. And a small amount of Si-O bonds are deposited and then the deposited thin film protect silicon dioxyde against reaction chlorine with silicon in SiO$_2$. Consequently, we can improve the selectivity of polysilicon the silicon dioxide, which is clearly explained in this model.

• 한국재료학회지
• /
• 제23권4호
• /
• pp.246-249
• /
• 2013

Nano-sized ${\beta}$-SiC nanoparticles were synthesized combined with a sol-gel process and a carbothermal process. TEOS and carbon black were used as starting materials for the silicon source and carbon source, respectively. $SiO_2$ nanoparticles were synthesized using a sol-gel technique (Stober process) combined with hydrolysis and condensation. The size of the particles could be controlled by manipulating the relative rates of the hydrolysis and condensation reactions of tetraethyl orthosilicate (TEOS) within the micro-emulsion. The average particle size and morphology of synthesized silicon dioxide was about 100nm and spherical, respectively. The average particles size and morphology of the used carbon black powders was about 20nm and spherical, respectively. The molar ratio of silicon dioxide and carbon black was fixed to 1:3 in the preparation of each combination. $SiO_2$ and carbon black powders were mixed in ethanol and ball-milled for 12 h. After mixing, the slurries were dried at $80^{\circ}C$ in an oven. The dried powder mixtures were placed in alumina crucibles and synthesized in a tube furnace at $1400{\sim}1500^{\circ}C$ for 4 h with a heating rate of $10^{\circ}C$/min under flowing Ar gas (160 cc/min) and furnace cooling down to room temperature. SiC nanoparticles were characterized by XRD, TEM, and SAED. The XRD results showed that high purity beta silicon carbide with excellent crystallinity was synthesized. TEM revealed that the powders are spherical shape nanoparticles with diameters ranging from 15 to 30 nm with a narrow distribution.

• 한국화재소방학회논문지
• /
• 제26권4호
• /
• pp.18-23
• /
• 2012

이산화탄소 주조법에서 사용되고 있는 방법을 응용하여 목질내에 규산겔과 탄산소다, 이산화규소가 석출된 목재를 제조한 후 외부 복사열원(20, 25, 35 및 50 $kW/m^2$)에 따른 점화시간, 점화온도, 질량감소속도, 임계열유속을 측정하였다. 연구결과, 물유리와 이산화탄소를 이용한 가압함침 처리된 목재는 Pre-Flashover 단계에서의 복사열원(20 $kW/m^2$ 이하)에서 난연성능이 있음을 확인할 수 있었다. 향후 지속적인 연구를 통해 우수한 배합비율을 찾는다면 난연목재로서의 활용가능성이 있다고 판단된다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1999년도 하계학술대회 논문집 G
• /
• pp.3279-3281
• /
• 1999

This paper describes a method of direct wafer bonding using surfaces activated by a radio-frequency hydrogen plasma. The hydrogen plasma cleaning of silicon in the RIE mode was investigated as a pretreatment for silicon direct bonding. The cleaned silicon surface was successfully terminated by hydrogen, The hydrogen-terminated surfaces were rendered hydrophilic, which could be wetted by Dl water rinse. Two wafers of silicon and silicon dioxide were contacted to each other at room temperature and postannealed at $300{\sim}1100^{\circ}C$ in an $N_2$ atmosphere for 2 h. From the AFM results, it was revealed that the surface became rougher with the increased plasma exposure time and power. The effect of the plasma treatment on the surface chemistry was investigated by the AES analysis. It was shown that the carbon contamination at the surface could be reduced below 5 at %. The interfacial energy measured by the crack propagation method was 122 $mJ/m^2$ and 384 $mJ/m^2$ for RCA cleaning and hydrogen plasm, respectively.

• 한국재료학회:학술대회논문집
• /
• 한국재료학회 1999년도 추계학술발표강연 및 논문개요집
• /
• pp.150-150
• /
• 1999

• 대한전자공학회논문지
• /
• 제23권4호
• /
• pp.490-497
• /
• 1986

The effectiveness of field plate and window tapering in reducing the maximum surface electric field of planar pn junctions has been studied by two dimensional computer simulation. The influence of silicon dioxide insulator thickness is also presented.

• 한국세라믹학회지
• /
• 제41권3호
• /
• pp.197-201
• /
• 2004

플라즈마 화학기상증착(PECVD)법을 이용하여 Si(100) 웨이퍼에 silicon oxide(SiO$_2$)와 silicon oxynitride(SiON) 후막을 SiH$_4$, $N_2$O, $N_2$가스를 혼합하여 증착하였다. RF power와 rf bias power의 변화에 따른 SiO$_2$ 막과 SiON 막의 특성변화에 대하여 고찰하였다. RF power와 rf bias power가 증가함에 따라 굴절률은 감소하는 경향을 나타내었으며, 막의 굴절률은 1552 nm에서 1.4493-1.4952까지 변화하였다. 이와 같이 rf power가 증가함에 따라 굴절률이 감소하는 이유는 oxygen의 량이 증가하고 nitrogen의 량이 감소하여 즉, O/N 비가 증가하여 굴절률이 감소하는 경향을 나타내었다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1996년도 하계학술대회 논문집 C
• /
• pp.1988-1990
• /
• 1996

In this work, we have grown or evaporated thermal oxide and E-beam oxide on the (100) oriented n-type silicon wafers, respectively and they were directly bonded with another silicon wafer after hydrophilization using solutions of three types of $HNO_3$, $H_{2}SO_{4}$ and $NH_{4}OH$. Changes of average surface roughness after hydrophilizations of the single crystalline silicon wafer, thermal oxide and E-beam evaporated silicon oxide were studied using atomic force microscope. Bonding interfaces of the bonded pairs were inspected using scanning electron microscope. Void and non-contact area of the bonded pairs were also inspected using infrared transmission microscope.

• 한국전기전자재료학회논문지
• /
• 제17권1호
• /
• pp.21-26
• /
• 2004

Ultra-thin silicon dioxides were grown on p-type(100) oriented silicon employing rapid thermal dry oxidation technique at the temperature range of 850∼1050 $^{\circ}C$. The growth rate of the ultra-thin film was fitted well with tile model which was proposed recently by da Silva ＆ Stosic. The capacitance-voltage, current-voltage, characteristics were used to study the electrical properties of these thin oxides. The minimum interface state density around the midgap of the MOS capacitor having oxide thickness of 111.6 $\AA$ derived from the C-V curve was ranged from 6 to 10${\times}$10$^{10}$ /$\textrm{cm}^2$eV.