• Journal of Electrical Engineering and Technology
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• 제11권1호
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• pp.125-134
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• 2016

We propose an efficient high voltage level shifter for a high side Buck converter driving a light-emitting diode (LED) lamp. The proposed circuit is comprised of a low voltage pulse width modulation (PWM) signal driver, a coupling capacitor, a resistor, and a diode. The proposed method uses a property of a PWM signal. The property is that the signal repeatedly transits between a low and high level at a certain frequency. A low voltage PWM signal is boosted to a high voltage PWM signal through a coupling capacitor using the property of the PWM signal, and the boosted high voltage PWM signal drives a p-channel metal oxide semiconductor (PMOS) transistor on the high side Buck converter. Experimental results show that the proposed level shifter boosts a low voltage (0 to 20 V) PWM signal at 125 kHz to a high voltage (370 to 380 V) PWM signal with a duty ratio of up to 0.9941.

• 전력전자학회논문지
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• 제19권5호
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• pp.422-430
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• 2014

This study proposes a small-signal model and control design for a two-stage DC-DC-AC converter to investigate its dynamic characteristics in relation to battery energy storage system. When the circuit analysis of the two-stage DC-DC-AC converter is attempted simultaneously, the mathematical procedure of deriving the dynamic equation is complex and difficult. The main idea of modeling the two-stage DC-DC-AC converter states that this topology is separated into a bidirectional DC-DC converter and a single-phase inverter with an equivalent current source corresponding to that of the inverter or converter. The dynamic equations for the separated converter and inverter are then derived using the state-space averaging technique. The procedures of building the small-signal model of the two-stage DC-DC-AC converter are described in detail. Based on the derived small-signal model, the individual controllers are designed through a frequency-domain analysis. The simulation and experimental results verify the validity of the proposed modeling approach and controller design.

• 전력전자학회논문지
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• 제22권2호
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• pp.159-165
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• 2017

Small-signal modeling and controller design methodology are proposed to improve the dynamics and stability of a DC-DC dual active bridge (DAB) converter. The state-space average method has a limitation when applied to the DAB converter because its state variables are nonlinear and have zero average values in a switching period. Therefore, the small-signal model and the frequency response of the DAB converter are derived and analyzed using a generalized average method instead of conventional modeling methods. The design methodology of a lead-lag controller instead of the conventional proportional-integral controller is also proposed using the derived small-signal model. The accuracy and performance of the proposed small-signal model and controller are verified by simulation and experimental results with a 500 W prototype DAB converter.

• 전력전자학회논문지
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• 제22권2호
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• pp.102-108
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• 2017

Proper design guides are proposed for a practical dual-active bridge (DAB) converter based on the mathematical model on the steady state. The DAB converter is popular in bidirectional application due to its zero-voltage capability and easy bidirectional operation for seamless control, high efficiency, and performance. Some design considerations are taken to overcome the limitation of the DAB converter. The practical design methodology of power stage is discussed to minimize the conduction and switching losses of the DAB converter. Small-signal model and frequency response are derived and analyzed based on the generalized average method, which considers equivalent series resistance, to improve the dynamics, stability, and reliability with voltage regulation of the practical DAB converter. The design of closed-loop control is discussed by the derived small-signal model to obtain the pertinent gain and phase margin in steady-state operation. Experimental results of a 3.3 kW prototype of DAB converter demonstrate the validity and effectiveness of the proposed methods.

• Journal of Power Electronics
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• 제14권2호
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• pp.217-225
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• 2014

This paper deals with the optimization of the driving techniques for the ZVT synchronous buck converter proposed in [1]. Two new gate drive circuits are proposed to allow this converter to operate by only one control signal as a 12V voltage regulator module (VRM). Voltage-driven method is applied for the synchronous rectifier. In addition, the control signal drives the main and auxiliary switches by one driving circuit. Both of the circuits are supplied by the input voltage. As a result, no supply voltage is required. This approach decreases both the complexity and cost in converter hardware implementation and is suitable for practical applications. In addition, the proposed SR driving scheme can also be used for many high frequency resonant converters and some high frequency discontinuous current mode PWM circuits. The ZVT synchronous buck converter with new gate drive circuits is analyzed and the presented experimental results confirm the theoretical analysis.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1235-1238
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• 2004

This paper presents the large-signal transient analysis of a self-driven active-clamp forward converter, eliminating the extra drive circuit for the active clamp switch. The operation principle of the converter was presented and experiential results were used to verify the analyzed results. A 50-W prototype converter built and tested it. From the tested results, input transient response and load transient response of the converter were established.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2019년도 전력전자학술대회
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• pp.317-319
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• 2019

In this paper, a three level duty cycle controlled half bridge LLC converter for EV charger application is presented. The topology and operating regions of the converter are discussed. The equations of the converter are derived in time domain. A small signal model of the converter is developed by perturbation and linearization of the steady state model about their operating point using Extended Describing function.

• 전력전자학회논문지
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• 제27권3호
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• pp.192-199
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• 2022

In DC distribution systems, a TAB converter employing multiple transformers is one of the most widely used topologies due to its high power density, modularizability, and cost-effectiveness. However, the conventional control technique for a grid-connected mode in the TAB converter cannot maintain its reliability for an islanding mode under a blackout situation. In this paper, the islanding mode control technique is proposed to solve this issue. To verify the relative stability and dynamic characteristics of the control technique, small-signal models of both the grid connected and the islanding mode are derived. Based on the small-signal models, PI controllers are designed to provide suitable power control. The proposed control technique, the accuracy of small-signal models, and the performance of the controllers are verified by simulations and experiments with a 1-kW prototype TAB converter.

• 한국정보통신학회논문지
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• 제23권7호
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• pp.816-821
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• 2019

듀얼에지 T 플립플롭을 사용하여 카운터 타입의 시간-디지털 변환기를 설계하였다. 시간-디지털 변환기는 공급 전압 1.5volts에서 $0.18{\mu}mCMOS$ 공정으로 설계하였다. 일반적인 시간-디지털 변환기에서 클록의 주기가 T일 때, 입력신호와 클록의 비동기로 인하여 클록의 주기에 해당하는 변환 에러가 발생한다. 그러나 본 논문에서 제안한 시간-디지털 변환기의 클록은 입력신호인 시작신호와 동기화되어 생성된다. 그 결과 시작신호와 클록의 비동기로 인해 발생할 수 있는 변환 에러는 발생하지 않는다. 그리고 카운터를 구성하는 플립플롭은 분해능 향상을 위해 클록의 상승에지와 하강에지에서 동작하는 듀얼에지 플립플롭으로 구성하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 V
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• pp.2621-2624
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• 2003

In this paper, we designed 12Bit DAC(Digital to Analog Converter) that applied to multiple-valued logic system to Binary system. The proposed D/A Converter structure consists of the Binary to Quaternary Converter(BQC) and Quaternary to Analog Converter(QAC). The BQC converts the two input binary signals to the one Digit Quaternary output signal. The QAC converts the Quaternary input signal to the Analog output signal. The proposed DAC structure can implement voltage mode DAC that high resolution low power consumption with reduced chip area. And also, it has advantage of the easy expansion of resolution and fast settling time.