• Title/Summary/Keyword: SiC substrate

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Selective Chemical Vapor Deposition of $\beta$-SiC on Si Substrate Using Hexamethyldisilane/HCl/$H_2$ Gas System

  • Yang, Won-Jae;Kim, Seong-Jin;Chung, Yong-Sun;Auh, Keun-Ho
    • Proceedings of the Korea Association of Crystal Growth Conference
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    • 1998.09a
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    • pp.91-95
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    • 1998
  • Selectivity of SiC deposition on a Si substrate partially covered with a masking material was investigated by introducing HCl gas into hexamethyldisilane/H2 gas system during the deposition. the schedule of the precursor and HCl gas flows was modified so that the selectivity of SiC deposition between a Si substrate and a mask material should be improved. It was confirmed that the selectivity of SiC deposition was improved by introducing HCl gas. Also, the pulse gas flow technique was effective to enhance the selectivity.

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Hermetic Characteristics of Negative PR (Negative PR의 기밀 특성)

  • Choi, Eui-Jung;Sun, Yong-Bin
    • Journal of the Semiconductor & Display Technology
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    • v.5 no.2 s.15
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    • pp.33-36
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    • 2006
  • Many issues arose to use the Pb-free solder as adhesive materials in MEMS ICs and packaging. Then this study for easy and simple sealing method using adhesive materials was carried out to maintain hermetic characteristic in MEMS Package. In this study, Hermetic characteristic using negative PR (XP SU-8 3050 NO-2) as adhesive at the interface of Si test coupon/glass substrate and Si test coupon/LTCC substrate was examined. For experiment, the dispenser pressure was 4 MPa and the $200\;{\mu}m{\Phi}$ syringe nozzle was used. 3.0 mm/sec as speed of dispensing and 0.13 mm as the gap between Si test coupon and nozzle was selected to machine condition. 1 min at $65^{\circ}C$ and 15 min at $95^{\circ}C$ as Soft bake, $200\;mj/cm^2$ expose in 365 nm wavelength as UV expose, 1 min at $65^{\circ}C$ and 6 min at $95^{\circ}C$ as Post expose bake, 60 min at $150^{\circ}C$ as hard bake were selected to activation condition of negative PR. Hermetic sealing was achieved at the Si test coupon/ glass substrate and Si test coupon/LTCC substrate. The leak rate of Si test coupon/glass substrate was $5.9{\times}10^{-8}mbar-l/sec$, and there was no effect by adhesive method. The leak rate of Si test coupon/LTCC substrate was $4.9{\times}10^{-8}mbar-l/sec$, and there was no effect by dispensing cycle. Better leak rate value could be achieved to use modified substrate which prevent PR flow, to increase UV expose energy and to use system that controls gap automatically with vision.

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Anisotropic Wet-Etching Process of Si Substrate for Formation of Thermal Vias in High-Power LED Packages (고출력 LED 패키지의 Thermal Via 형성을 위한 Si 기판의 이방성 습식식각 공정)

  • Yu, B.K.;Kim, M.Y.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.51-56
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    • 2012
  • In order to fabricate through-Si-vias for thermal vias by using wet etching process, anisotropic etching behavior of Si substrate was investigated as functions of concentration and temperature of TMAH solution in this study. The etching rate of 5 wt%, 10 wt%, and 25 wt% TMAH solutions, of which temperature was maintained at $80^{\circ}C$, was $0.76{\mu}m/min$, $0.75{\mu}m/min$, and $0.30{\mu}m/min$, respectively. With changing the temperature of 10 wt% TMAH solution to $20^{\circ}C$ and $50^{\circ}C$, the etching rate was reduced to $0.067{\mu}m/min$ and $0.233{\mu}m/min$, respectively. Through-Si-vias of $500{\mu}m$-depth could be fabricated by etching a Si substrate for 5 hours in 10 wt% TMAH solution at $80^{\circ}C$ after forming same via-pattern on each side of the Si substrate.

Study on RF power dependence of BST thin film by the different substrates (기판에 따른 BST 박막의 RF Power 의존성)

  • 최명률;이태일;박인철;김홍배
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.22-25
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    • 2002
  • In this paper, we deposited MgO buffer layer on p-type (100)Si substrate in the condition of substrate temperature 400$^{\circ}C$, working gas ratio Ar:O$_2$=80:20, RF Power 50W, working pressure 10mtorr, and the thickness of the film was about 300${\AA}$. Then we deposited Ba$\sub$0.5/Sr$\sub$0.5/TiO$_3$ thin film using RF Magnetron sputtering method on the MgO/Si substrate in various RF power of 25W, 50W, 75W. The film deposited in 50W showed the best crystalline from the XRD measurement. To know the electrical properties of the film, we manufactured Al/BSTMgO(300${\AA}$)/Si/Al structure capacitor. In the result of I-V measurement, The leakage current density of the capacitor was lower than 10$\^$-7/A/$\textrm{cm}^2$ at the range of ${\pm}$150kV/cm. From C-V characteristics of the capacitor, can calculate the dielectric constant and it was 305. Finally we deposited BST thin film on bare Si substrate and (100)MgO substrate in the same deposition condition. From the comparate of the properties of these samples, we found the properties of BST thin film which deposited on MgO/Si substrate were better than on bare Si substrate and similar to on MgO substrate.

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Electrical Characteristics of SiC Lateral P-i-N Diodes Fabricated on SiC Semi-Insulating Substrate

  • Kim, Hyoung Woo;Seok, Ogyun;Moon, Jeong Hyun;Bahng, Wook;Jo, Jungyol
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.387-392
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    • 2018
  • Static characteristics of SiC (silicon carbide) lateral p-i-n diodes implemented on semi-insulating substrate without an epitaxial layer are inVestigated. On-axis SiC HPSI (high purity semi-insulating) and VDSI (Vanadium doped semi-insulating) substrates are used to fabricate the lateral p-i-n diode. The space between anode and cathode ($L_{AC}$) is Varied from 5 to $20{\mu}m$ to inVestigate the effect of intrinsic-region length on static characteristics. Maximum breakdown Voltages of HPSI and VDSI are 1117 and 841 V at $L_{AC}=20{\mu}m$, respectiVely. Due to the doped Vanadium ions in VDSI substrate, diffusion length of carriers in the VDSI substrate is less than that of the HPSI substrate. A forward Voltage drop of the diode implemented on VDSI substrate is 12 V at the forward current of $1{\mu}A$, which is higher than 2.5 V of the diode implemented on HPSI substrate.

Fracture toughness of amorphus SiC thin films using nanoindentation and simulation

  • Mamun, M.A.;Elmustafa, A.A.
    • Advances in materials Research
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    • v.9 no.1
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    • pp.49-62
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    • 2020
  • Fracture toughness of SiC on Si thin films of thicknesses of 150, 750, and 1500 nm were measured using Agilent XP nanoindenter equipped with a Dynamic Control Module (DCM) in Load Control (LC) and Continuous Stiffness Method (CSM) protocols. The fracture toughness of the Si substrate is also measured. Nanovision images implied that indentations into the films and well deep into the Si caused cracks to initiate at the Si substrate and propagate upward to the films. The composite fracture toughness of the SiC/Si was measured and the fracture toughness of the SiC films was determined based on models that estimate film properties from substrate properties. The composite hardness and modulus of the SiC films were measured as well. For the DCM, the hardness decreases from an average of 35 GPa to an average of 13 GPa as the film thick increases from 150 nm to 1500 nm. The hardness and moduli of the films depict the hardness and modulus of Si at deep indents of 12 and 200 GPa respectively, which correlate well with literature hardness and modulus values of Si. The fracture toughness values of the films were reported as 3.2 MPa√m.

Interfacial Characteristics of $\beta$-SiC Film Growth on (100) Si by LPCVD Using MTS (MTS를 사용한 LPCVD 법에 의한 (100)Si 위의 $\beta$-SiC 증착 및 계면특성)

  • 최두진;김준우
    • Journal of the Korean Ceramic Society
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    • v.34 no.8
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    • pp.825-833
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    • 1997
  • Silicon carbide films were deposited by low pressure chemical vapor deposition(LPCVD) using MTS(CH3SICl3) in hydrogen atmosphere on (100) Si substrate. To prevent the unstable interface from being formed on the substrate, the experiments were performed through three deposition processes which were the deposition on 1) as received Si, 2) low temperature grown SiC, and 3) carbonized Si by C2H2. The microstructure of the interface between Si substrates and SiC films was observed by SEM and the adhesion between Si substrates and SiC films was measured through scratch test. The SiC films deposited on the low temperature grown SiC thin films, showed the stable interfacial structures. The interface of the SiC films deposited on carbonized Si, however, was more stable and showed better adhesion than the others. In the case of the low temperature growth process, the optimum condition was 120$0^{\circ}C$ on carbonized Si by 3% C2H2, at 105$0^{\circ}C$, 5 torr, 10 min, showed the most stable interface. As a result of XRD analysis, it was observed that the preferred orientation of (200) plane was increased with Si carbonization. On the basis of the experimental results, the models of defect formation in the process of each deposition were compared.

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Influence of Carbonization Conditions in Hydrogen Poor Ambient Conditions on the Growth of 3C-SiC Thin Films by Chemical Vapor Deposition with a Single-Source Precursor of Hexamethyldisilane

  • Kim, Kang-San;Chung, Gwiy-Sang
    • Journal of Sensor Science and Technology
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    • v.22 no.3
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    • pp.175-180
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    • 2013
  • This paper describes the characteristics of cubic silicon carbide (3C-SiC) films grown on a carbonized Si(100) substrate, using hexamethyldisilane (HMDS, $Si_2(CH_3)_6$) as a safe organosilane single precursor in a nonflammable $H_2$/Ar ($H_2$ in Ar) mixture carrier gas by atmospheric pressure chemical vapor deposition (APCVD) at $1280^{\circ}C$. The growth process was performed under various conditions to determine the optimized growth and carbonization condition. Under the optimized condition, grown film has a single crystalline 3C-SiC with well crystallinity, small voids, low residual stress, low carrier concentration, and low RMS. Therefore, the 3C-SiC film on the carbonized Si (100) substrate is suitable to power device and MEMS fields.

Growth of hexagonal Si epilayer on 4H-SiC substrate by mixed-source HVPE method (혼합 소스 HVPE 방법에 의한 4H-SiC 기판 위의 육각형 Si 에피층 성장)

  • Kyoung Hwa Kim;Seonwoo Park;Suhyun Mun;Hyung Soo Ahn;Jae Hak Lee;Min Yang;Young Tea Chun;Sam Nyung Yi;Won Jae Lee;Sang-Mo Koo;Suck-Whan Kim
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.33 no.2
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    • pp.45-53
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    • 2023
  • The growth of Si on 4H-SiC substrate has a wide range of applications as a very useful material in power semiconductors, bipolar junction transistors and optoelectronics. However, it is considerably difficult to grow very fine crystalline Si on 4H-SiC owing to the lattice mismatch of approximately 20 % between Si and 4H-SiC. In this paper, we report the growth of a Si epilayer by an Al-related nanostructure cluster grown on a 4H-SiC substrate using a mixed-source hydride vapor phase epitaxy (HVPE) method. In order to grow hexagonal Si on the 4H-SIC substrate, we observed the process in which an Al-related nanostructure cluster was first formed and an epitaxial layer was formed by absorbing Si atoms. From the FE-SEM and Raman spectrum results of the Al-related nanostructure cluster and the hexagonal Si epitaxial layer, it was considered that the hexagonal Si epitaxial layer had different characteristics from the general cubic Si structure.

Macroscopic Wear Behavior of C/C and C/C-SiC Composites Coated with Hafnium Carbide

  • Lee, Kee Sung;Sihn, Ihn Cheol;Lim, Byung-Joo;Lim, Kwang Hyun
    • Journal of the Korean Ceramic Society
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    • v.52 no.6
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    • pp.429-434
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    • 2015
  • This study investigates the macroscopic wear behaviors of C/C and C/C-SiC composites coated with hafnium carbide (HfC). To improve the wear resistance of C/C composites, low-pressure chemical vapor deposition (LPCVD) was used to obtain HfC coating. The CVD coatings were deposited at various deposition temperatures of 1300, 1400, and $1500^{\circ}C$. The effect of the substrate material (the C/C substrate, the C/C-CVR substrate, or the C/C-SiC substrate deposited by LSI) was also studied to improve the wear resistance. The experiment used the ball-on-disk method, with a tungsten carbide (WC) ball utilized as an indenter to evaluate the wear behavior. The HfC coatings were found to effectively improve the wear resistance of C/C and C/C-SiC composites, compared with the case of a non-coated C/C composite. The former showed lower friction coefficients and almost no wear loss during the wear test because of the presence of hard coatings. The wear scar width was relatively narrower for the C/C and C/C-SiC composites with hafnium coatings. Wear behavior was found to critically depend on the deposition temperature and the material. Thus, the HfC-coated C/C-SiC composites fabricated at deposition temperatures of $1500^{\circ}C$ showed the best wear resistance, a lower friction coefficient, and almost no loss during the wear test.