• Title/Summary/Keyword: SiC Paper

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Enhancing Solar Cell Properties of Heterojunction Solar Cell in Amorphous Silicon Carbide (수광층의 카바이드 함량 변화에 따른 실리콘 이종접합 태양전지 특성 변화)

  • Kim, Hyunsung;Kim, Sangho;Lee, Youngseok;Jeong, Jun-Hui;Kim, Yongjun;Dao, Vinh Ai;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.29 no.6
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    • pp.376-379
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    • 2016
  • In this paper, the efficiency improvement of the heterojunction with intrinsic thin layer (HIT) solar cells is obtained by optimization process of p-type a-SiC:H as emitter. The optoelectronic of p-type a-SiC:H layers including the optical band-gap and conductivity under the methane gas content variation is conducted in detail. A significant increase in the Jsc by $1mA/cm^2$ and Voc by 30 mV are attributed to enhanced photon-absorption due to broader band-gap of p-a-SiC:H and reduced band-offsets at p-side interface, respectively of HIT solar cells.

A Novel 1700V 4H-SiC Double Trench MOSFET Structure for Low Switching Loss (스위칭 손실을 줄인 1700 V 4H-SiC Double Trench MOSFET 구조)

  • Na, Jae-Yeop;Jung, Hang-San;Kim, Kwang-Su
    • Journal of IKEEE
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    • v.25 no.1
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    • pp.15-24
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    • 2021
  • In this paper, 1700 V EPDT (Extended P+ shielding floating gate Double Trench) MOSFET structure, which has a smaller switching time and loss than CDT (Conventional Double Trench) MOSFET, is proposed. The proposed EPDT MOSFET structure extended the P+ shielding area of the source trench in the CDT MOSFET structure and divided the gate into N+ and floating P- polysilicon gate. By comparing the two structures through Sentaurus TCAD simulation, the on-resistance was almost unchanged, but Crss (Gate-Drain Capacitance) decreased by 32.54 % and 65.5 %, when 0 V and 7 V was applied to the gate respectively. Therefore, the switching time and loss were reduced by 45 %, 32.6 % respectively, which shows that switching performance was greatly improved.

Creep analysis of plates made of functionally graded Al-SiC material subjected to thermomechanical loading

  • Majid Amiri;Abbas Loghman;Mohammad Arefi
    • Advances in concrete construction
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    • v.15 no.2
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    • pp.115-126
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    • 2023
  • This paper investigates creep analysis of a plate made of Al-SiC functionally graded material using Mendelson's method of successive elastic solution. All mechanical and thermal material properties, except Poisson's ratio, are assumed to be variable along the thickness direction based on the volume fraction of reinforcement and thickness. First, the basic relations of the plate are derived using the Love-Kirchhoff plate theory. The solution of governing equations yields an elastic solution to start creep analysis. The creep behavior is demonstrated through Norton's equation based on Pandey's experimental results extracted for Al-SiC functionally graded material. A linear variation is assumed for temperature distribution along the thickness direction. The creep strain, as well as the thermal strain, are included in the governing equations derived from classical plate theory for mechanical strain. A successive elastic solution based on Mendelson's method is employed to derive the history of stresses, strains, and displacements over a long time. History of stresses and deformations are obtained over a long time to predict damage to the plate because of various loadings, and material composition along the thickness and planar directions.

Transformer Leakage Inductance Calculation Used in DAB Converters Considering the Influence of SiC MOSFET Parasitic Capacitance (SiC MOSFET 기생 커패시턴스의 영향을 고려한 DAB 컨버터에 사용되는 변압기의 누설인덕턴스 계산)

  • Cheol-Woong Choi;Jae-Sub Ko;Ji-Yong So;Dae-Kyong Kim
    • Journal of the Korean Society of Industry Convergence
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    • v.27 no.4_2
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    • pp.935-942
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    • 2024
  • This study analyzes the effects of the parasitic capacitance of the SiC MOSFET used in the Dual Active Bridge ( DAB) converter and proposes a method for calculating the leakage inductance of the transformer. The DAB converter employs high-frequency switching to achieve high efficiency, high power density, and reliability. MOSFETs possess parasitic capacitance, which induces resonance with the leakage inductance of the transformer during switching operations, resulting in a voltage change delay. This paper discusses the effect of the delay of voltage changes on the DAB converter output and proposes a method to calculate the delay time. This method aims to equalize the delay time to minimize this effect and enhance the accuracy of the leakage inductance calculation of the transformer. The proposed method is validated through experiments and simulations.

Chromaticity(b*), Sheet Resistance and Transmittance of SiO2-ITO Thin Films Deposited on PET Film by Using Roll-to-Roll Sputter System (롤투롤시스템을 이용하여 PET 필름위에 제조된 SiO2-ITO 박막의 색도(b*), 면저항과 투과도 연구)

  • Park, Mi-Young;Kang, Bo-Gab;Kim, Jung-Soo;Kim, Hye-Young;Kim, Hu-Sik;Lim, Woo-Taik;Choi, Sik-Young
    • Korean Journal of Materials Research
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    • v.21 no.5
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    • pp.255-262
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    • 2011
  • This paper has relatively high technical standard and experimental skill. The fabrication of TCO film with high transparency, low resistance and low chromaticity require exact control of several competing factors. This paper has resolved these problems reasonably well, thus recommended for publication. Indium tin oxide(ITO) thin films were by D.C. magnetron roll-to-roll sputter system utilizing ITO and $SiO_2$ targets of ITO and $SiO_2$. In this experiment, the effect of D.C. power, winding speed, and oxygen flow rate on electrical and optical properties of ITO thin films were investigated from the view point of sheet resistance, transmittance, and chromaticity($b^*$). The deposition of $SiO_2$ was performed with RF power of 400W, Ar gas of 50 sccm and the deposition of ITO, DC power of 600W, Ar gas of 50 sccm, $O^2$ gas of 0.2 sccm, and winding speed of 0.56m/min. High quality ITO thin films without $SiO_2$ layer had chromaticity of 2.87, sheet resistivity of 400 ohm/square, and transmittance of 88% and $SiO_2$-doped ITO Thin film with chromaticity of 2.01, sheet resistivity of 709 ohm/square, and transmittance of more than 90% were obtained. As a result, $SiO_2$ was coated on PET before deposition of ITO, their chromaticity($b^*$) and transmittance were better than previous results of ITO films. These results show that coating of $SiO_2$ induced arising chromaticity($b^*$) and transmittance. If the thickness of $SiO_2$ is controlled, sheet resistance value of ITO film will be expected to be better for touch screen. A four point probe and spectrophotometer are used to investigate the properties of ITO thin films.

Separating nanocluster Si formation and Er activation in nanocluster-Si sensitized Er luminescence

  • Kim, In-Yong;Sin, Jung-Hun;Kim, Gyeong-Jung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.109-109
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    • 2010
  • $Er^{3+}$ ion shows a stable and efficient luminescence at 1.54mm due to its $^4I_{13/2}\;{\rightarrow}\;^4I_{15/2}$ intra-4f transition. As this corresponds to the low-loss window of silica-based optical fibers, Er-based light sources have become a mainstay of the long-distance telecom. In most telecom applications, $Er^{3+}$ ions are excited via resonant optical pumping. However, if nanocluster-Si (nc-Si) are co-doped with $Er^{3+}$, $Er^{3+}$ can be excited via energy transfer from excited electrical carriers in the nc-Si as well. This combines the broad, strong absorption band of nc-Si with narrow, stable emission spectra of $Er^{3+}$ to allow top-pumping with off-resonant, low-cost broadband light sources as well as electrical pumping. A widely used method to achieve nc-Si sensitization of $Er^{3+}$ is high-temperature annealing of Er-doped, non-stoichiometric amorphous thin film with excess Si (e.g.,silicon-rich silicon oxide(SRSO)) to precipitate nc-Si and optically activate $Er^{3+}$ at the same time. Unfortunately, such precipitation and growth of nc-Si into Er-doped oxide matrix can lead to $Er^{3+}$ clustering away from nc-Si at anneal temperatures much lower than ${\sim}1000^{\circ}C$ that is necessary for full optical activation of $Er^{3+}$ in $SiO_2$. Recently, silicon-rich silicon nitride (SRSN) was reported to be a promising alternative to SRSO that can overcome this problem of Er clustering. But as nc-Si formation and optical activation $Er^{3+}$ remain linked in Er-doped SRSN, it is not clear which mechanism is responsible for the observed improvement. In this paper, we report on investigating the effect of separating the nc-Si formation and $Er^{3+}$ activation by using hetero-multilayers that consist of nm-thin SRSO or SRSN sensitizing layers with Er-doped $SiO_2$ or $Si_3N_4$ luminescing layers.

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The Fabrication of Four-Terminal Poly-Si TFTs with Buried Channel (Buried Channel 4단자 Poly-Si TFTs 제작)

  • Jeong, Sang-Hun;Park, Cheol-Min;Yu, Jun-Seok;Choe, Hyeong-Bae;Han, Min-Gu
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.12
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    • pp.761-767
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    • 1999
  • Poly-Si TFTs(polycrystalline silicon thin film transistors) fabricated on a low cost glass substrate have attracted a considerable amount of attention for pixel elements and peripheral driving circuits in AMLCS(active matrix liquid crystal display). In order to apply poly-Si TFTs for high resolution AMLCD, a high operating frequency and reliable circuit performances are desired. A new poly-Si TFT with CLBT(counter doped lateral body terminal) is proposed and fabricated to suppress kink effects and to improve the device stability. And this proposed device with BC(buried channel) is fabricated to increase ON-current and operating frequency. Although the troublesome LDD structure is not used in the proposed device, a low OFF-current is successfully obtained by removing the minority carrier through the CLBT. We have measured the dynamic properties of the poly-Si TFT device and its circuit. The reliability of the TFTs and their circuits after AC stress are also discussed in our paper. Our experimental results show that the BC enables the device to have high mobility and switching frequency (33MHz at $V_{DD}$ = 15 V). The minority carrier elimination of the CLBT suppresses kink effects and makes for superb dynamic reliability of the CMOS circuit. We have analyzed the mechanism in order to see why the ring oscillators do not operate by analyzing AC stressed device characteristics.

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Effect of $Al_2O_3$ pre-layers formed using protective Si-oxide layer on the growth of ultra thin ${\gamma}-Al_2O_3$ epitaxial layer (보호용 실리콘 산화막을 이용하여 제조된 $Al_2O_3$ 예비층이 초박막 ${\gamma}-Al_2O_3$ 에피텍시의 성장에 미치는 영향)

  • Jung, Young-Chul;Jun, Bon-Keun;Ishida, Makoto
    • Journal of Sensor Science and Technology
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    • v.9 no.5
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    • pp.389-395
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    • 2000
  • In this paper, we propose the formation of an $Al_2O_3$ pre-layer using a protective Si-oxide layer and Al layer. Deposition of a thin film layer of aluminum onto a Si surface covered with a thin Si-oxide layer and annealing at $800^{\circ}C$ led to the growth of epitaxial $Al_2O_3$ layer on Si(111). And ${\gamma}-Al_2O_3$ layer was grown on the $Al_2O_3$ per-layer. Etching of the Si substrate by $N_2O$ gas could be avoided in the initial growth stage by the $Al_2O_3$ pre-layer. It was confirmed that the $Al_2O_3$ pre-layer was effective in improving the surface morphology of the very thin ${\gamma}-Al_2O_3$ films.

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Open Switch Fault Tolerance Control of Active NPC Inverters With HF/LF Modulation (HF/LF 변조를 적용한 Active NPC 인버터의 개방 고장 허용 제어)

  • Jung, Won Seok;Kim, Ye-Ji;Kim, Seok-Min;Lee, Kyo-Beum
    • Journal of IKEEE
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    • v.24 no.1
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    • pp.170-177
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    • 2020
  • This paper presents an open-fault tolerance control method for active neutral point clamped (ANPC) inverter with high frequency/low frequency (HF/LF) modulation. By applying the ANPC inverter with SiC MOSFETs and Si IGBTs, the system efficiency and performance can be improved compared to a Si-based inverter. HF/LF modulation is used for a megawatt-scale inverter to minimize the commutation loop. The open-switch failure in megawatt-scale inverter causes severe damage to load and huge expenses when the inverter has been shut-down. The proposed tolerance control of open-switch failure provides continuous operation and improved reliability to the ANPC inverter. The effectiveness of the proposed fault tolerance control is verified by simulation results.

A Study on the Fabrication of p-type poly-Si Thin Film Transistor (TFT) Using Sequential Lateral Solidification(SLS) (SLS 공정을 이용한 p-type poly-Si TFT 제작에 관한 연구)

  • Lee, Yun-Jae;Park, Jeong-Ho;Kim, Dong-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.51 no.6
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    • pp.229-235
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    • 2002
  • This paper presents the fabrication of polycrystalline thin film transistor(TFT) using sequential lateral solidification(SLS) of amorphous silicon. The fabricated SLS TFT showed high Performance suitable for active matrix liquid crystal display(AMLCD). The SLS process involves (1) a complete melting of selected area via irradiation through a patterned mask, and (2) a precisely controlled pulse translation of the sample with respect to the mask over a distance shorter than the super lateral growth(SLG) distance so that lateral growth extended over a number of iterative steps. The SLS experiment was performed with 550$\AA$ a-Si using 308nm XeCl laser having $2\mu\textrm{m}$ width. Irradiated laser energy density is 310mJ/$\textrm{cm}^2$ and pulse duration time was 25ns. The translation distance was 0.6$\mu$m/pulse, 0.8$\mu$m/pulse respectively. As a result, a directly solidified grain was obtained. Thin film transistors (TFTs) were fabricated on the poly-Si film made by SLS process. The characteristics of fabricated SLS p -type poly-Si TFT device with 2$\mu\textrm{m}$ channel width and 2$\mu\textrm{m}$ channel length showed the mobility of 115.5$\textrm{cm}^2$/V.s, the threshold voltage of -1.78V, subthreshold slope of 0.29V/dec, $I_{off}$ current of 7$\times$10$^{-l4}$A at $V_{DS}$ =-0.1V and $I_{on}$ / $I_{off}$ ratio of 2.4$\times$10$^{7}$ at $V_{DS}$ =-0.1V. As a result, SLS TFT showed superior characteristics to conventional poly-Si TFTs with identical geometry.y.y.y.