• Journal of the Korean Electrochemical Society
• /
• v.16 no.1
• /
• pp.1-8
• /
• 2013

This review article summarizes metal-assisted chemical etching (MAC etch or MACE), an anisotropic etching method for Si, and describes principles, main factors, and recent achievements in literature. In 1990, it was discovered that, with metal catalyst on surface and $H_2O_2$/HF as etchant, Si substrate can be etched anisotropically, in even in solution. In contrast to high-cost vacuum-based dry etching methods, MAC etch enables to fabricate a variety of high aspect ratio nanostructures through wet etching process.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.407-407
• /
• 2014

Nanotechnology, especially vertically grown silicon nanowires, has gotten great attentions in biology due to characteristics of one dimensional nanostructure; controllable synthetic structure such as lengths, diameters, densities. Silicon nanowires are promising materials as nanoelectrodes due to their highly complementary metal-oxide-semiconductor (CMOS) - and bio-compatibility. Silicon nanowires are so intoxicated that are effective for bio molecular delivery and electrical stimulation. Vertical nanowires with integrated Au tips were fabricated for electrical intracellular interfacing with PC-12 cells. We have made synthesized two types of nanowire devices; one is multi-nanowires electrode for bio molecular sensing and electrical stimulation, and the other is single-nanowires electrode respectively. Here, we demonstrate that differentiation of Nerve Growth Factor (NGF) treated PC-12 cells can be promoted depending on different magnitudes of electrical stimulation and density of Si NWs. It was fabricated by both bottom-up and top-down approaches using low pressure chemical vapor deposition (LPCVD) with high vacuuming environment to electrically stimulate PC-12 cells. The effects of electrical stimulation with NGF on the morphological differentiation are observed by Scanning Electron Microscopy (SEM), and it induces neural outgrowth. Moreover, the cell cytosol can be dyed selectively depending on the degree of differentiation along with fluorescence microscopy measurement. Vertically grown silicon nanowires have further expected advantages in case of single nanowire fabrication, and will be able to expand its characteristics to diverse applications.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.354-354
• /
• 2012

In this study, we report the vertically aligned ZnO nanowires by using different type of Ga-doped ZnO (GZO) thin films as seed layers to investigate how the underlying GZO film micro structure affects the distribution of ZnO nanowires. Arrays of highly ordered ZnO nanowires have been synthesized on GZO thin film seed layer prepared on p-Si substrates ($7-13{\Omega}cm$) with utilize of a pulsed laser deposition (PLD). With the vapor-liquid-solid (VLS) growth process, the ZnO nanowire synthesis carries out no metal catalyst and is cost-effective; furthermore, The GZO seed layer facilitates the uniform growth of well-aligned ZnO nanowires. The influence of the growth temperature and various thickness of GZO seed layer have been analyzed. Crystallinity of grown seed layer was studied by X-Ray diffraction (XRD); diameter and morphology of ZnO nanowires on seed layer were investigated by field emission scanning electron microscopy (FE-SEM). Our results suggest that the GZO seed layer with high c-axis orientation, good crystallinity, and less lattice mismatch is key parameters to optimize the growth of well-aligned ZnO nanowire arrays.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2014.02a
• /
• pp.160.2-160.2
• /
• 2014

Recently silicon has attracted intense interest as a promising anode material of lithium-ion batteries due to its extremely high capacity of 4200 mA/g (for Li4.2Si) that is much higher than 372 mAh/g (for LiC6) of graphite. However, it seriously suffers from large volume change (even up to 300%) of the electrode upon lithiation, leading to its pulverization or mechanical failure during lithiation/delithiation processes and the rapid capacity fading. To overcome this problem, Si nanowires have been considered. Use of such Si nanowires provides their facile relaxation during lithiation/delithiation without mechanical breaking. To design better Si electrodes, a study to unveil atomic-scale mechanisms involving the volume expansion and the phase transformation upon lithiation is critical. In order to investigate the lithiation mechanism in Si nanowires, we have developed a reactive force field (ReaxFF) for Si-Li systems based on density functional theory calculations. The ReaxFF method provides a highly transferable simulation method for atomistic scale simulation on chemical reactions at the nanosecond and nanometer scale. Molecular dynamics (MD) simulations with the ReaxFF reproduces well experimental anisotropic volume expansion of Si nanowires during lithiation and diffusion behaviors of lithium atoms, indicating that it would be definitely helpful to investigate lithiation mechanism of Si electrodes and then design new Si electrodes.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.79.1-79.1
• /
• 2012

Si 기판을 무전해 식각하여 나노와이어 형태로 합성하는 방법은 쉽고 간단하기 때문에 이를 이용한 소자 특성 연구가 많이 진행되고 있다. 하지만 이러한 방법으로 제작된 Si 나노와이어의 경우 식각에 의하여 나노와이어 표면이 매우 거칠어지기 때문에 고유의 특성을 나타내기 어려워 표면 특성을 제어 할 수 있는 연구의 필요성이 대두되고 있다. 본 연구에서는 무전해 식각법을 이용하여 p와 n형 나노와이어를 각각 합성하고 그 특성을 구현하기 위하여 표면조절을 진행하였다. 특히 n형 나노와이어의 경우 표면의 OH- 이온으로 인하여 n채널 특성이 제대로 나타나지 않기 때문에 열처리를 이용하여 표면을 보다 평평한 형태로 조절하여 향상된 전기적 특성을 얻을 수 있었다. 여기에 나노와이어와 절연막 사이의 계면 결함을 최소화 하기 위하여 poly-4-vinylphenol (PVP) 고분자 절연막에 나노와이어를 삽입시켜 나노와이어의 문턱전압 값을 조절하였다. 이를 바탕으로 complementary metal-oxide semiconductor(CMOS) 구조의 인버터 소자를 제작하였으며 p형 나노와이어가 절연막에 삽입된 정도에 따라 인버터의 midpoint voltage 값을 조절 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2013.08a
• /
• pp.266.2-266.2
• /
• 2013

According to advanced nanotechnology, the nanostructured materials with various kinds and shape are synthesized easily or produced by process. Recently, researches about interaction between the nanostructured materials and biological system have been progressed actively. The surface topography may influence cellular responses, for example cell adhesion, cell morphology. In this work, we synthesized vertically aligned silicon nanowires (SiNWs) on the Au-covered Si(111) wafer by chemical vapor deposition (CVD) method. We accomplished to control of the SiNWs diameter by regulating thickness of Au film such as 1 nm and 10 nm. These substrates did not isolate cells and just provided surface topography for cell culture. Human Embryonic Kidney 293T cells (HEK 293T cells) were cultured on these substrates for 2 days. We studied the nanotopographical effects on cell morphology, adhesion, and growth which are evaluated on each SiNWs substrate comparing bare glass as control.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.02a
• /
• pp.427-427
• /
• 2012

Ferroelectric-gate field effect transistor based memory using a nanowire as a conducting channel offers exceptional advantages over conventional memory devices, like small cell size, low-voltage operation, low power consumption, fast programming/erase speed and non-volatility. We successfully fabricated ferroelectric nonvolatile memory devices using both n-type and p-type Si nanowires coated with organic ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] via a low temperature fabrication process. The devices performance was carefully characterized in terms of their electrical transport, retention time and endurance test. Our p-type Si NW ferroelectric memory devices exhibit excellent memory characteristics with a large modulation in channel conductance between ON and OFF states exceeding $10^5$; long retention time of over $5{\times}10^4$ sec and high endurance of over 105 programming cycles while maintaining ON/OFF ratio higher $10^3$. This result offers a viable way to fabricate a high performance high-density nonvolatile memory device using a low temperature fabrication processing technique, which makes it suitable for flexible electronics.

• Proceedings of the KIEE Conference
• /
• 2007.07a
• /
• pp.1339-1340
• /
• 2007

본 연구에서는 이종 차원 나노선과 나노입자의 결합에 따른 단일 나노선 소자의 전기적 특성 및 메모리 효과를 연구하였다. 열증착법으로 성장 된 p 형 Si 나노선에 Atomic Layer Deposition (ALD) 방법으로 10nm의 $Al_{2}O_{3}$를 증착한 후 Low Precensure - Chemical Vapor Deposition (LP-CVD)를 이용하여 Polycrystalline Sicon(Poly-Si)을 Si 나노선 위에 5nm 증착하고 습식 에칭법을 이용하여 poly Si 내의 $SiO_x$를 제거하여 Si 나노입자를 Si 나노선 위에 형성시켰다. 그 후 포토리소그래피 공정을 이용하여 Top gate 형태의 나노선-나노입자 이종결합 Field-Effect Transistor (FET) 소자를 제작하여 게이트 전압에 따른 드레인 전류-전압($I_{DS}-V_{DS}$)의 변화를 측정하여 나노선의 전기 소자로서의 특성을 확인하고, 게이트 전압을 양방향으로 swing 하면서 인가하여 $I_{DS}$ 전류 특성이 변화하는 것을 통해 메모리 효과를 조사하였다. 또한 나노입자의 결합이 게이트 전압의 인가 시간에 따라 드레인 전류에 영향을 미치는 것을 확인하여 메모리 소자로서의 가능성을 확인하였다.

• Journal of the Korean Vacuum Society
• /
• v.20 no.6
• /
• pp.395-402
• /
• 2011

The nanomechanical properties of fully lithiated and unlithiated silicon nanowire deposited on silicon substrate have been studied with atomic force microscopy. Silicon nanowires were synthesized using the vapor-liquid-solid process on stainless steel substrates using Au catalyst. Fully lithiated silicon nanowires were obtained by using the electrochemical method, followed by drop-casting on the silicon substrate. The roughness, derived from a line profile of the surface measured in contact mode atomic force microscopy, has a smaller value ($0.65{\pm}0.05$ nm) for lithiated silicon nanowire and a higher value ($1.72{\pm}0.16$ nm) for unlithiated silicon nanowire. Force spectroscopy was utilitzed to study the influence of lithiation on the tip-surface adhesion force. Lithiated silicon nanowire revealed a smaller value (~15 nN) than that of the Si nanowire substrate (~60 nN) by a factor of two, while the adhesion force of the silicon nanowire is similar to that of the silicon substrate. The elastic local spring constants obtained from the force-distance curve, also shows that the unlithiated silicon nanowire has a relatively smaller value (16.98 N/m) than lithiated silicon nanowire (66.30 N/m) due to the elastically soft amorphous structures. The frictional forces of lithiated and unlithiated silicon nanowire were obtained within the range of 0.5-4.0 Hz and 0.01-200 nN for velocity and load dependency, respectively. We explain the trend of adhesion and modulus in light of the materials properties of silicon and lithiated silicon. The results suggest a useful method for chemical identification of the lithiated region during the charging and discharging process.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.117-117
• /
• 2012

Si:Ge alloy semiconductor nanocrystals (NCs) offer challenging opportunities for integrated optoelectronics/optoplasmonics, since they potentially allow unprecedentedly strong light-matter interaction in the wavelength range of the optical communication. In this talk, we discuss the recent research efforts of my laboratory to develop optoelectronic components based on individual group IV NCs. We present experimental demonstration of the individual NC optoelectronic devices, including broadband Si:Ge nanowire (NW) photodetectors, intra NW p-n diodes, Ge NC electrooptical modulators and near-field plasmonic NW detectors, where the unique size effects at the nanometer scales commonly manifest themselves. In particular, we demonstrated a scanning photocurrent imaging technique to investigate dynamics of photocarriers in individual Si:Ge NWs, which provides spatially and spectrally resolved local information without ensemble average. Our observations represent inherent size-effects of internal gain in semiconductor NCs, thereby provide a new insight into nano optoplasmonics.