• Title/Summary/Keyword: Si wafer Surface

Search Result 408, Processing Time 0.027 seconds

Micro/Nano Adhesion and Friction Properties of SAMs with Different Head and Functional Group according to the Coating Methods (코팅 방법에 따른 이종 SAMs의 관능기별 마이크로/나노 응착 및 마찰 특성)

  • Yoon Eui-Sung;Oh Hyun-Jin;Han Hung-Gu;Kong Hosung
    • Tribology and Lubricants
    • /
    • v.21 no.3
    • /
    • pp.107-113
    • /
    • 2005
  • Micro/nano adhesion and friction properties of self-assembled monolayers (SAMs) with different head- and end-group were experimentally studied according to the coating methods. Various kinds of SAM having different spacer chains (C10 and C18), head-group and end-group were deposited onto Si-wafer by dipping and chemical vapour deposition (CVD) methods under atmospheric pressure, where the deposited SAM resulted in the hydrophobic nature. The adhesion and friction properties between tip and SAM surfaces under nano scale applied load were measured using an atomic force microscope (AFM) and also those under micro scale applied load were measured using a ball-on-flat type micro-tribotester. Surface roughness and water contact angles were measured with SPM (scanning probe microscope) and contact anglemeter respectively. Results showed that water contact angles of SAMs with the end-group of fluorine show higher relatively than those of hydrogen. SAMs with the end-group of fluorine show lower nano-adhesion but higher micro/nanofriction than those with hydrogen. Water contact angles of SAMs coated by CVD method show high values compared to those by dipping method. SAMs coated by CVD method show the increase of nano-adhesion but the decrease of nano-friction. Nano-adhesion and friction mechanism of SAMs with different end-group was proposed in a view of size of fluorocarbon molecule.

A Study on Application of Ag Nano-Dots and Silicon Nitride Film for Improving the Light Trapping in Mono-crystalline Silicon Solar Cell (단결정 실리콘 태양전지의 광 포획 개선을 위한 Ag Nano-Dots 및 질화막 적용 연구)

  • Choi, Jeong-Ho;Roh, Si-Cheol;Seo, Hwa-Il
    • Journal of the Semiconductor & Display Technology
    • /
    • v.18 no.4
    • /
    • pp.12-17
    • /
    • 2019
  • In this study, the Ag nano-dots structure and silicon nitride film were applied to the textured wafer surface to improve the light trapping effect of mono-crystalline silicon solar cell. Ag nano-dots structure was formed by performing a heat treatment for 30 minutes at 650℃ after the deposition of 10nm Ag thin film. Ag thin film deposition was performed using a thermal evaporator. The silicon nitride film was deposited by a Hot-wire chemical vapor deposition. The effect of light trapping was compared and analyzed through light reflectance measurements. Experimental results showed that the reflectivity increased by 0.5 ~ 1% under all nitride thickness conditions when Ag nano-dots structure was formed before nitride film deposition. In addition, when the Ag nano-dots structure is formed after deposition of the silicon nitride film, the reflectance is increased in the nitride film condition of 70 nm or more. When the HF treatment was performed for 60 seconds to improve the Ag nano-dot structure, the overall reflectance was improved, and the reflectance was 0.15% lower than that of the silicon nitride film-only sample at 90 nm silicon nitride film condition.

A Study on the Fabrication of the Solar Cells using the Recycled Silicon Wafers (Recycled Si Wafer를 이용한 태양전지의 제작과 특성 연구)

  • Choi, Song-Ho;Jeong, Kwang-Jin;Koo, Kyoung-Wan;Cho, Tong-Yul;Chun, Hui-Gon
    • Journal of Sensor Science and Technology
    • /
    • v.9 no.1
    • /
    • pp.70-75
    • /
    • 2000
  • The recycled single crystal silicon wafers have been fabricated into solar cells. It can be a solution for the high cost in materials for solar cells and recycling of materials. So, p-type (100) single crystal silicon wafers with high resistivity of $10-14\;{\Omega}cm$ and the thickness of $650\;{\mu}m$ were used for the fabrication of solar cells. Optimistic conditions of formation of back surface field, surface texturing and anti-reflection coating were studied for getting high efficiency. In addition, thickness variation of solar cell was also studied for increase of efficiency. As a result, the solar cell with efficiency of 10% with a curve fill factor of 0.53 was fabricated with the wafers which have the area of $4\;cm^2$ and thickness of $300\;{\mu}m$. According to above results, recycling possibility of wasted wafers to single crystal silicon solar cells was confirmed.

  • PDF

Fabrication and Characteristics of a Varactor Diode for UHF TV Tuner Operated within Low Tuning Voltage (저전압 UHF TV 튜너용 바렉터 다이오드의 제작 및 특성)

  • Kim, Hyun-Sik;Moon, Young-Soon;Son, Won-Ho;Choi, Sie-Young
    • Journal of Sensor Science and Technology
    • /
    • v.23 no.3
    • /
    • pp.185-191
    • /
    • 2014
  • The width of depletion region in a varactor diode can be modulated by varying a reverse bias voltage. Thus, the preferred characteristics of depletion capacitance can obtained by the change in the width of depletion region so that it can select only the desirable frequencies. In this paper, the TV tuner varactor diode fabricated by hyper-abrupt profile control technique is presented. This diode can be operated within 3.3 V of driving voltage with capability of UHF band tuning. To form the hyperabrupt profile, firstly, p+ high concentration shallow junction with $0.2{\mu}m$ of junction depth and $1E+20ions/cm^3$ of surface concentration was formed using $BF_2$ implantation source. Simulation results optimized important factors such as epitaxial thickness and dose quality, diffusion time of n+ layer. To form steep hyper-abrupt profile, Formed n+ profile implanted the $PH_3$ source at Si(100) n-type epitaxial layer that has resistivity of $1.4{\Omega}cm$ and thickness of $2.4{\mu}m$ using p+ high concentration Shallow junction. Aluminum containing to 1% of Si was used as a electrode metal. Area of electrode was $30,200{\mu}m^2$. The C-V and Q-V electric characteristics were investigated by using impedance Analyzer (HP4291B). By controlling of concentration profile by n+ dosage at p+ high concentration shallow junction, the device with maximum $L_F$ at -1.5 V and 21.5~3.47 pF at 0.3~3.3 V was fabricated. We got the appropriate device in driving voltage 3.3 V having hyper-abrupt junction that profile order (m factor) is about -3/2. The deviation of capacitance by hyper-abrupt junction with C0.3 V of initial capacitance is due to the deviation of thermal process, ion implantation and diffusion. The deviation of initial capacitance at 0.3 V can be reduced by control of thermal process tolerance using RTP on wafer.

Characterization and annealing effect of tantalum oxide thin film by thermal chemical (열CVD방법으로 증착시킨 탄탈륨 산화박막의 특성평가와 열처리 효과)

  • Nam, Gap-Jin;Park, Sang-Gyu;Lee, Yeong-Baek;Hong, Jae-Hwa
    • Korean Journal of Materials Research
    • /
    • v.5 no.1
    • /
    • pp.42-54
    • /
    • 1995
  • $Ta_2O_5$ thin film IS a promising material for the high dielectrics of ULSI DRAM. In this study, $Ta_2O_5$ thin film was grown on p-type( 100) Si wafer by thermal metal organic chemical vapo deposition ( MCCVD) method and the effect of operating varialbles including substrate temperature( $T_s$), bubbler temperature( $T_ \sigma$), reactor pressure( P ) was investigated in detail. $Ta_2O_5$ thin film were analyzed by SEM, XRD, XPS, FT-IR, AES, TEM and AFM. In addition, the effect of various anneal methods was examined and compared. Anneal methods were furnace annealing( FA) and rapid thermal annealing( RTA) in $N_{2}$ or $O_{2}$ ambients. Growth rate was evidently classified into two different regimes. : (1) surface reaction rate-limited reglme in the range of $T_s$=300 ~ $400 ^{\circ}C$ and (2: mass transport-limited regime in the range of $T_s$=400 ~ $450^{\circ}C$.It was found that the effective activation energies were 18.46kcal/mol and 1.9kcal/mol, respectively. As the bubbler temperature increases, the growth rate became maximum at $T_ \sigma$=$140^{\circ}C$. With increasing pressure, the growth rate became maximum at P=3torr but the refractive index which is close to the bulk value of 2.1 was obtained in the range of 0.1 ~ 1 torr. Good step coverage of 85. 71% was obtained at $T_s$=$400 ^{\circ}C$ and sticking coefficient was 0.06 by comparison with Monte Carlo simulation result. From the results of AES, FT-IR and E M , the degree of SiO, formation at the interface between Si and TazO, was larger in the order of FA-$O_{2}$ > RTA-$O_{2}$, FA-$N_{2}$ > RTA-$N_{2}$. However, the $N_{2}$ ambient annealing resulted in more severe Weficiency in the $Ta_2O_5$ thin film than the TEX>$O_{2}$ ambient.

  • PDF

Preparation and Characterization of Iron Phthalocyanine Thin Films by Vacuum Sublimation (진공증착법을 이용한 철프탈로시아닌 박막의 합성과 그 특성)

  • Jee, Jong-Gi;Lee, Jae-Gu;Hwang, Dong-Uk;Lim, Yoon-Mook;Yang, Hyun-Soo;Ryu, Haiil;Park, Ha-Sun
    • Applied Chemistry for Engineering
    • /
    • v.10 no.5
    • /
    • pp.644-651
    • /
    • 1999
  • In this experiment the Iron phthalocyanine (FePc) films on Si-wafer and alumina pallet were prepared using vacuum sublimation with conditions of changing reaction time, temperature, and deposition rate. Then, some samples were annealed following annealing. Techniques such as XRD, SEM, and resistance measurement method, were dedicated to characterize the changes of surface structure, phase transformation and electric resistance sensitivity in accordance with change of film thickness. In proportion to the decrease of deposition temperature from $370^{\circ}C$ to $350^{\circ}C$, intensities of (200), (011), (211) and (114) planes of $\alpha$-phase were decreased and (100) plane of $\beta$-phase were appeared. The film thickness were controlled by regulating the volume of precursor material during rapid deposition. As a result, it was observed that crystalline particle size had been increased according to the increase of film thickness and $\alpha$-phase transformed to $\beta$-phase. In consequence of measuring the crystallinity of films annealed between $150^{\circ}C$ and $350^{\circ}C$, $\alpha$- to $\beta$-phase transformation was appeared to begin at $150^{\circ}C$ and completely transformed to $\beta$-phase at $350^{\circ}C$. Electric resistance sensitivity of FePc film to $NO_x$ gas along temperature change of FePc films was observed to be more stable with the decrease of the film thickness.

  • PDF

Effects of thickness of GIZO active layer on device performance in oxide thin-film-transistors

  • Woo, C.H.;Jang, G.J.;Kim, Y.H.;Kong, B.H.;Cho, H.K.
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2009.06a
    • /
    • pp.137-137
    • /
    • 2009
  • Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

  • PDF

The Effect of Mask Patterns on Microwire Formation in p-type Silicon (P-형 실리콘에서 마이크로 와이어 형성에 미치는 마스크 패턴의 영향)

  • Kim, Jae-Hyun;Kim, Kang-Pil;Lyu, Hong-Kun;Woo, Sung-Ho;Seo, Hong-Seok;Lee, Jung-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2008.11a
    • /
    • pp.418-418
    • /
    • 2008
  • The electrochemical etching of silicon in HF-based solutions is known to form various types of porous structures. Porous structures are generally classified into three categories according to pore sizes: micropore (below 2 nm in size), mesopore (2 ~ 50 nm), and macropore (above 50 nm). Recently, the formation of macropores has attracted increasing interest because of their promising characteristics for an wide scope of applications such as microelectromechanical systems (MEMS), chemical sensors, biotechnology, photonic crystals, and photovoltaic application. One of the promising applications of macropores is in the field of MEMS. Anisotropic etching is essential step for fabrication of MEMS. Conventional wet etching has advantages such as low processing cost and high throughput, but it is unsuitable to fabricate high-aspect-ratio structures with vertical sidewalls due to its inherent etching characteristics along certain crystal orientations. Reactive ion dry etching is another technique of anisotropic etching. This has excellent ability to fabricate high-aspect-ratio structures with vertical sidewalls and high accuracy. However, its high processing cost is one of the bottlenecks for widely successful commercialization of MEMS. In contrast, by using electrochemical etching method together with pre-patterning by lithographic step, regular macropore arrays with very high-aspect-ratio up to 250 can be obtained. The formed macropores have very smooth surface and side, unlike deep reactive ion etching where surfaces are damaged and wavy. Especially, to make vertical microwire or nanowire arrays (aspect ratio = over 1:100) on silicon wafer with top-down photolithography, it is very difficult to fabricate them with conventional dry etching. The electrochemical etching is the most proper candidate to do it. The pillar structures are demonstrated for n-type silicon and the formation mechanism is well explained, while such a experimental results are few for p-type silicon. In this report, In order to understand the roles played by the kinds of etching solution and mask patterns in the formation of microwire arrays, we have undertaken a systematic study of the solvent effects in mixtures of HF, dimethyl sulfoxide (DMSO), iso-propanol, and mixtures of HF with water on the structure formation on monocrystalline p-type silicon with a resistivity with 10 ~ 20 $\Omega{\cdot}cm$. The different morphological results are presented according to mask patterns and etching solutions.

  • PDF