• Current Photovoltaic Research
• /
• v.11 no.4
• /
• pp.114-117
• /
• 2023

Transparent Photovoltaic (PV) modules have recently been in the spotlight because they can be applied to buildings and vehicles. However, crystalline silicon (c-Si) solar modules, which account for about 90% of the PV module market, have the disadvantage of applying transparent PV modules due to their unique opacity. Recently, a see-through type PV module using a crystalline silicon solar strap has been developed. However, there is a problem due to a decrease in aesthetics due to the metal ribbon in the center of the see-through type PV module and difficulty bonding the metal ribbon due to the low voltage output of the strap. In this study, to solve this problem, we developed a fabrication process of series connected c-Si solar strap cells using the c-Si solar cells. We succeeded in fabricating a series connected strap with a width of 2-10 mm, and we plan to manufacture an aesthetic see-through type c-Si PV module.

• Journal of IKEEE
• /
• v.23 no.4
• /
• pp.1448-1456
• /
• 2019

In this study, when applying LED light sources within a single-span glass greenhouse for growing crops, the illumination simulation was performed on the ceiling and side of the glass greenhouse to determine the selective placement and effective light transmission of Si series solar cells and dye-sensitive solar cells (DSSC) for supplying LED power source. In addition, energy saving effects of glass greenhouses were analyzed for optimum lighting control when both daylight and LED light sources are considered in glass greenhouses.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.36 no.5
• /
• pp.442-453
• /
• 2023

Tandem or multijunction solar cells (MJSCs) can convert sunlight into electricity with higher efficiency (η) than single junction solar cells (SJSCs) by dividing the solar irradiance over sub-cells having distinct bandgaps. The efficiencies of various common SJSC materials are close to the edge of their theoretical efficiency and hence there is a tremendous growing interest in utilizing the tandem/multijunction technique. Recently, III-V materials integration on a silicon substrate has been broadly investigated in the development of III-V on Si tandem solar cells. Numerous growth techniques such as heteroepitaxial growth, wafer bonding, and mechanical stacking are crucial for better understanding of high-quality III-V epitaxial layers on Si. As the choice of growth method and substrate selection can significantly impact the quality and performance of the resulting tandem cell and the terminal configuration exhibit a vital role in the overall proficiency. Parallel and Series-connected configurations have been studied, each with its advantage and disadvantages depending on the application and cell configuration. The optimization of both growth mechanisms and terminal configurations is necessary to further improve efficiency and lessen the cost of III-V on Si tandem solar cells. In this review article, we present an overview of the growth mechanisms and terminal configurations with the areas of research that are crucial for the commercialization of III-V on Si tandem solar cells.

• Korean Journal of Materials Research
• /
• v.28 no.1
• /
• pp.38-42
• /
• 2018

Continuous efforts are being made to improve the efficiency of Si solar cells, which is the prevailing technology at this time. As opposed to the standard front-lit solar cell design, the back-lit design suffers no shading loss because all the metal electrodes are placed on one side close to the pn junction, which is referred to as the front side, and the incoming light enters the denuded back side. In this study, a systematic comparison between the two designs was conducted by means of computer simulation. Medici, a two-dimensional semiconductor device simulation tool, was utilized for this purpose. The $0.6{\mu}m$ wavelength, the peak value for the AM-1.5 illumination, was chosen for the incident photons, and the minority-carrier recombination lifetime (${\tau}$), a key indicator of the Si substrate quality, was the main variable in the simulation on a p-type $150{\mu}m$ thick Si substrate. Qualitatively, minority-carrier recombination affected the short circuit current (Isc) but not the opencircuit voltage (Voc). The latter was most affected by series resistance associated with the electrode locations. Quantitatively, when ${\tau}{\leq}500{\mu}s$, the simulation yielded the solar cell power outputs of $20.7mW{\cdot}cm^{-2}$ and $18.6mW{\cdot}cm^{-2}$, respectively, for the front-lit and back-lit cells, a reasonable 10 % difference. However, when ${\tau}$ < $500{\mu}s$, the difference was 20 % or more, making the back-lit design less than competitive. We concluded that the back-lit design, despite its inherent benefits, is not suitable for a broad range of Si solar cells but may only be applicable in the high-end cells where float-zone (FZ) or magnetic Czochralski (MCZ) Si crystals of the highest quality are used as the substrate.

• Proceedings of the Korean Institute of Surface Engineering Conference
• /
• 2007.04a
• /
• pp.19-19
• /
• 2007

Recently, we have developed p-i-n hydrogenated amorphous silicon (a-Si:H) single junction (SJ) thin film solar cells with RF (13,56MHz) plasma enhanced chemical vapor deposition (PECVD) systems, and also successfully fabricated the mini-modules (>300$cm^2$), using laser scribing technique to form an integrated series connection, The efficiency of a mini-module was 7.4% (Area=305$cm^2$, $I_{SC}$=0.25A, $V_{OC}$=14.74V, FF=62%).

• Korean Journal of Materials Research
• /
• v.26 no.8
• /
• pp.422-426
• /
• 2016

With the increase in installed solar energy capacity, comparison and analysis of the physical property values of solar cells are becoming increasingly important for production. Therefore, research on determining the physical characteristic values of solar cells is being actively pursued. In this study, a diode equation, which is commonly used to describe the I-V behavior and determine the electrical characteristic values of solar cells, was applied. Using this method, it is possible to determine the diode ideality factor (n) and series resistance ($R_s$) based on light I-V measurements. Thus, using a commercial screen-printed solar cell and an interdigitated back-contact solar cell, we determined the ideality factor (n) and series resistance ($R_s$) with a modified diode equation method for the light I-V curves. We also used the sun-shade method to determine the ideality factor (n) and series resistance ($R_s$) of the samples. The values determined using the two methods were similar. However, given the error in the sun-shade method, the diode equation is considered more useful than the sun-shade method for analyzing the electrical characteristics because it determines the ideality factor (n) and series resistance ($R_s$) based on the light I-V curves.

• 한국신재생에너지학회:학술대회논문집
• /
• 2010.06a
• /
• pp.91.2-91.2
• /
• 2010

The use of plated front contact for metallization of silicon solar cell may alternative technologies as a screen printed and silver paste contact. This technologies should allow the formation of contact with low contact resistivity a high line conductivity and also reduction of shading losses. The better performance of Ni/Cu contacts is attributed to the reduced series resistance due to better contact conductivity of Ni with Si and subsequent electroplating of Cu on Ni. The ability to pattern narrower grid lines for reduced light shading combined with the lower resistance of a metal silicide contact and improved conductivity of plated deposit. This improves the FF as the series resistance is deduced. This is very much required in the case of low concentrator solar cells in which the series resistance is one of the important and dominant parameter that affect the cell performance. A selective emitter structure with highly dopes regions underneath the metal contacts, is widely known to be one of the most promising high-efficiency solution in solar cell processing. This paper using selective emitter structure technique, fabricated Ni/Cu plating metallization cell with a cell efficiency of 17.19%.

• 한국신재생에너지학회:학술대회논문집
• /
• 2010.06a
• /
• pp.72.2-72.2
• /
• 2010

Nowadays, the crystalline Si Solar cell are expected for economical renewable energy source. The cost of the crystalline Si solar cell are decreasing by improvement of its efficiency and decrease of the cost of the raw Si wafers for Solar cells. This Si wafer based crystalline Si solar cell is the verified technology from several decade of its history. Now, I will introduce one method that can be upgrade the efficiency by using simple and economical method. The name of this method is Rear Side Etching(RSE). The purpose of rear side etching is the elimination of n+ layer of rear side and increase of the flatness. The effects of rear side etching are the improvement of Voc and increase of efficiency by reducement series resistance and forming of uniform BSF. The experimental procedure for rear side etching is very simple. After anti-reflection coating on solar cell wafer, Solar cell wafer is etched by the etching chemical that react with only rear side not front side. This special chemical is no harmful to anti-reflection coating layer. It can only etched rear side of solar cell wafer. We can use etching image by optical microscope, minority carrier life time by WCT 120, SiNx thickness and refractive index by ellipsometer, cell efficiency for the RSE effect measurement. The key point of rear side etching is development of etching process condition that react with only rear side. If we can control this factor, we can achieve increase of solar cell efficiency very economically without new device.

• 한국신재생에너지학회:학술대회논문집
• /
• 2010.11a
• /
• pp.43.1-43.1
• /
• 2010

In the crystalline silicon solar cells, the full area aluminum_back surface field(BSF) is routinely achieved through the screen-printing of aluminum paste and rapid firing. It is widely used in the industrial solar cell because of the simple and cost-effective process to suppress the overall recombination at the back surface. However, it still has limitations such as the relatively higher recombination rate and the low-to-moderate reflectance. In addition, it is difficult to apply it to thinner substrate due to wafer bowing. In the recent years, the dielectric back-passivated cell with local back contacts has been developed and implemented to overcome its disadvantages. Although it is successful to gain a lower value of surface recombination velocity(SRV), the series resistance($R_{series}$) becomes even more important than the conventional solar cell. That is, it is a trade off relationship between the SRV and the $R_{series}$ as a function of the contact size, the contact spacing and the geometry of the opening. Therefore it is essential to find the best compromise between them for the high efficiency solar cell. We have investigated the optimal design for the local back contact by using PC1D simulation.

• Journal of the Microelectronics and Packaging Society
• /
• v.26 no.3
• /
• pp.75-80
• /
• 2019

Silicon solar cells have been widely used as a most promising renewable energy source due to eco-friendliness and high efficiency. As modules of silicon solar cells are connected in series for a practical electricity generation, a large voltage of 500-1,500 V is applied to the modules inevitably. Potential-induced degradation (PID), a deterioration of the efficiency and maximum power output by the continuously applied high voltage between the module frames and solar cells, has been regarded as the major cause that reduces the lifetime of silicon solar cells. In particular, the migration of the $Na^+$ ions from the front glass into Si through the anti-reflection coating and the accumulation of $Na^+$ ions at stacking faults inside Si have been reported as the reason of PID. In this research, the thickness effect of $SiO_x$ layer that can block the migration of $Na^+$ ions on the reduction of PID is investigated as it is incorporated between anti-reflection coating and p-n junction in p-type PERC solar cells. From the measurement of shunt resistance, efficiency, and maximum power output after the continuous application of 1,000 V for 96 hours, it is revealed that the thickness of $SiO_x$ layer should be larger than 7-8 nm to reduce PID effectively.