• 전자공학회논문지A
• /
• 제29A권1호
• /
• pp.41-47
• /
• 1992

In SFB Process, after 110$0^{\circ}C$ annealing in wet OS12T(95$^{\circ}C$ HS12TO bubbling) atmosphere, the existence of the interfacial oxide film in micro-gap at Si-Si bonding interface was identified. The angle lapping/staining and SEM morphologies of bonding interface showed that the growing behavior of interfacial oxide made a contribution to eliminate the micro-gaps having a width of 200-300$\AA$. In case of the diodes composed of p-n wafer pairs made by SFB processes, the annealed one in wet OS12T atmosphere exhibited a dielectric breakdown phenomena of interfacial oxide at 37-40 volts d.c.

• 한국진공학회:학술대회논문집
• /
• 한국진공학회 2012년도 제42회 동계 정기 학술대회 초록집
• /
• pp.209-209
• /
• 2012

High-efficient transparent conductive oxide (TCO) film-embedding Si heterojunction solar cells were fabricated. An additional doping was not applied for heterojunction solar cells due to the spontaneous junction formation between TCO films and an n-type Si substrate. Three different TCO coatings were formed by sputtering method for an Al-doped ZnO (AZO) film, an indium-tin-oxide (ITO) film and double stacks of ITO/AZO films. An improved crystalline ITO film was grown on an AZO template upon hetero-epitaxial growth. This double TCO films-embedding Si heterojunction solar cell provided significantly enhanced efficiency of 9.23% as compared to the single TCO/Si devices. The effective arrangement of TCO films (ITO/AZO) provides benefits of a lower front contact resistance and a smaller band offset to Si leading enhanced photovoltaic performances. This demonstrates a potential scheme of the effective TCO film-embedding heterojunction Si solar cells.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1988년도 전기.전자공학 학술대회 논문집
• /
• pp.319-323
• /
• 1988

For finding the effects of As on $TiSi_2$ formation, sputter deposited Ti film on Si substrates implanted with various doses of As have been rapid thermal annealed in Ar atmosphere at temperatures of 600-900$^{\circ}C$ for 20 sec. The sheet resistance of Ti-Silicides was examined with 4-point probe, the thickness with ${\alpha}$-step, and the As dopant behavior in Si substrates with ASR. The thickness of Ti-Silicides decreased with increasing As doping, but Ti-Silicides sheet resistance increased with increasing it. However, the critical concentration effect reported by Park et al. was not observed. We observed that the thickness of native oxide increase with increasing As doping. Thus, we concluded that native oxide act as a "barrier" for the Si diffusion.

• 한국진공학회지
• /
• 제7권3호
• /
• pp.208-213
• /
• 1998

최근 셀리사이드(salicide) 제조시 $COSiO_2$의 에피텍셜 성장을 돕기 위하여 Ti층을 삽 입한 Co/Ti/Si 이중층 구조의 실리사이드화가 관심을 끌고 있다. Co/Ti 이중층을 이용한 salicide 트랜지스터가 성공적으로 만들어지기 위해서는 gate 주위의 spacer oxide위에 증착 된 Co/Ti 이중층을 급속열처리할 때 Co/Ti와 $SiO_2$간의 계면에서의 상호반응에 대하여 조사 하였다. Co/Ti 이중층은 $600^{\circ}C$에서 열처리한 후 면저항이 급격하게 증가하기 시작하였는데, 이것은 Co층이 $SiO_2$와의 계면에너지를 줄이기 위하여 응집되기 때문이다. 이때 Co/Ti의 열 처리후 Ti에 의하여 $SiO_2$기판의 일부가 분해됨으로써 절연체의 Ti산화물이 형성되었으나, 이외의 도전성 반응부산물은 발견되지 않았다.

• E2M - 전기 전자와 첨단 소재
• /
• 제10권7호
• /
• pp.659-667
• /
• 1997

The influence of SiO$_2$on the microstructure and electrical properties of zinc oxide varistor was investigated. Zn$_2$SiO$_4$third phase in the sintered body was found at grain boundaries, multiple grain junctions, and occasionally within ZnO grains. This phase acted as a grain growth inhibitor, which retard the grain growth of the ZnO matrix by impeding migration on the grain boundaries. As SiO$_2$ addition increases, average grain size decreased from 40.6${\mu}{\textrm}{m}$ to 26.9${\mu}{\textrm}{m}$ due to the pinning effect by Zn$_2$SiO$_4$ and drag effect by Si segregation at grain boundaries, the breakdown voltage consequently increased. When SiO$_2$ addition is increased, interface state density decreased, however, the barrier height increased by decrease of donor concentration, as a result, the nonlinear exponent increased and leakage current decreased. While, as SiO$_2$ addition increase, it was found that the apparent dielectric loss factor shows a tendency of decrease. Wholly, electrical properties of zinc oxide varistor can be said to be improved by SiO$_2$addition.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
• /
• pp.41-44
• /
• 2000

Ultra large scale integrated circuit(ULSI) & complementary metal oxide semiconductor(CMOS) circuits require gate electrode materials such as meta] silicides, titanium-silicide for gate oxides. Many previous authors have researched the improvements sub-micron gate oxide quality. However, little has been done on the electrical quality and reliability of ultra thin gates. In this research, we recommend novel shallow trench isolation structure and two step TiSi$_{2}$ formation for sub 0.1${\mu}{\textrm}{m}$ gate oxide.

• 한국재료학회지
• /
• 제2권1호
• /
• pp.76-82
• /
• 1992

$TEOS-O_3$ 산화막은 깔개층 물질에 따라 증착속도가 변하는 특성을 나타낸다. 본 논문에서는 $TEOS-O_3$ 산화막의 깔개층 물질 의존성 이외에도 배선 밀도, 배선 간격에 따라 증착속도가 달라지는 패턴 의존성에 대하여 조사하였다. 또한 $TEOS-O_3$ 산화막의 깔개층 물질 의존성 및 패턴 의존성을 줄이기 위해 다층 배선에서 1차 배선후에 깔개층, 즉 TEOS-base 프라즈마 산화막 및 $SiH_4-base$ 프라즈마 산화막을 증착했을 때 $TEOS-O_3$ 산화막의 증착 특성을 조사하였다. 그리고 그 깔개층 물질에 $N_2$ 프라즈마 처리를 했을 때 $TEOS-O_3$ 산화막의 증착 특성에 대해 조사하였다. 그 결과 $TEOS-O_3$ 산화막에서 기판 위에 배선 밀도와 배선 간격에 따른 의존성은 깔개층물질이 $SiH_4-base$ 일때보다 TEOS-base 프라즈마 산화막인 경우 $N_2$ 프라즈마 처리를 하면 깔개층 물질 표면이 O-Si-N화 되므로써 의존성이 사라지게 된다.

• 한국진공학회지
• /
• 제1권1호
• /
• pp.190-197
• /
• 1992

In this study we have investigated physical and electrical properties of high temperature oxide (HTO) thin film using dichlorosilane (DCS) gas. This film had low etch rate and excellent step coverage, and its characteristics of Si-O bond were similar to those of thermal oxide. I-V curves also showed similar electrical properties to those of thermally grown oxide (SiO2) while time dependent dielectric breakdown (TDDB) results revealed 1/4 value of thermal oxide. However, defect density was measured to be much lower value than that of thermal oxide.

• 센서학회지
• /
• 제13권4호
• /
• pp.264-269
• /
• 2004

This paper describes on an advanced technology of 3C-SiC/Si(100) wafer direct bonding using PECVD oxide to intermediate layer for SiCOI(SiC-on-Insulator) structure because it has an attractive characteristics such as a lower thermal stress, deposition temperature, more quick deposition rate and higher bonding strength than common used poly-Si and thermal oxide. The PECVD oxide was characterized by ATR-FTIR. The bonding strength with variation of HF pre treatment condition was measured by tensile strength measurement system. After etch-back using TMAH solution, roughness of 3CSiC surface crystallinity and bonded interface was measured and analyzed by AFM, XRD, and SEM respectively.

• Journal of Korean Vacuum Science & Technology
• /
• 제4권1호
• /
• pp.11-17
• /
• 2000

The low temperature electron mobilities were investigated in Si/$Si_{1-x}Ge_{x}$ modulation Doped (MOD) quantum well structure with thermally grown oxide. N-type Si/$Si_{1-x}Ge_{x}$ structures were fabricated by a gas source MBE. Thermal oxidation was carried out in a dry $O_2$ atmosphere at $700^{\circ}C$ for 7 hours. Electron mobilities were measured by a Hall effect and a magnetoresistant effect at low temperatures down to 0.4 K. Pronounced Shubnikov-de Haas (SdH) oscillations were observed at a low temperature showing two dimensional electron gases (2 DEG) in a tensile strained Si quantum well. The electron sheet density ($n_{s}$) of 1.5${\times}$$10^{12}$[$cm^{-2}$] and corresponding electron mobility of 14200 [$cm^2$$V^{-1}$$s^{-1}$] were obtained at low temperature of 0.4 K from Si/$Si_{1-x}Ge_{x}$ MOD quantum well structure with thermally grown oxide.