• The Transactions of the Korean Institute of Electrical Engineers C
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• v.49 no.4
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• pp.246-248
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• 2000

Closed-form expressions for the temperature dependent breakdown voltage and the on-resistance of the Si power MOSFETs were derived by employing effective temperature dependent ionization coefficient for electrons and holes. The breakdown voltage increases by 20% and the on-resistance increases 2 times when the temperature increases from 300 K to 423 K. The analytic results normalized to the values at 300 K show good agreement with the experimental data of Motorola within 3.5% and 7% for the breakdown voltage and the on-resistance, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.99-100
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• 2009

SGOI 1T-DRAM cells with various Ge mole fractions were fabricated and compared to the SOI 1T-DRAM cell. SGOI 1T-DRAM cells have a higher leakage current than SOI 1T-DRAM cell at subthreshold region. The leakage current due to crystalline defects and interface states at Si/SiGe increased with Ge mole. This phenomenon causes sensing margin and the retention time of SGOI 1T-DRAMs decreased with increase of Ge mole fraction.

• Proceedings of the KIEE Conference
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• 1992.07b
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• pp.820-824
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• 1992

An accurate method for extracting both Si film doping concentration and front or back silicon-to-oxide fixed charge density of fully depleted SOI devices is proposed. The method utilizes the current-to-voltage and capacitance-to-voltage characteristics of both SOI NMOSFET and PMOSFET which have the same doping concentration. The Si film doping concentration and the front or back silicon-to-oxide fixed charge density are extracted by mainpulating the respective threshold voltages of the SOI NMOSFET and PMOSFET according to the back surface condition (accumulation or inversion) and the capacitance-to-voltage characteristics of the SOI PMOSFET. Device simulations show that the proposed method has less than 10% errors for wide variations of the film doping concentration and the front or the back silicon-to-oxide fixed charge density.

• Journal of Power Electronics
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• v.15 no.6
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• pp.1489-1498
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• 2015

Gallium nitride (GaN)-based power switching devices, such as high-electron-mobility transistors (HEMT), provide significant performance improvements in terms of faster switching speed, zero reverse recovery, and lower on-state resistance compared with conventional silicon (Si) metal-oxide-semiconductor field-effect transistors (MOSFET). These benefits of GaN HEMTs further lead to low loss, high switching frequency, and high power density converters. Through simulation and experimentation, this research thoroughly contributes to the understanding of performance characterization including the efficiency, loss distribution, and thermal behavior of a 160-W GaN-based synchronous boost converter under various output voltage, load current, and switching frequency operations, as compared with the state-of-the-art Si technology. Original suggestions on design considerations to optimize the GaN converter performance are also provided.

• KIPE Magazine
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• v.14 no.1
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• pp.21-25
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• 2009

전력반도체소자는 1947년 트랜지스터의 출현으로 반도체시대가 도래한 이후 사이리스터, MOSFET 및 IGBT 등으로 발전하였다. 개발당시에는 10A 정도의 전류처리 능력과 수백V 정도의 진압저지능력을 가지고 있었지만, 현재에는 정격전류로는 약 8,000A, 정격전압으로는 무려 12kV 급까지 발전되었다. 그러나 전력반도체 소자의 대부분은 실리콘을 윈료로 제작되고 있으며 현재 실리콘의 물성적 한계에 직면하여 고전압, 저손실 및 고속 스위칭화에 대한 새로운 도전이 시작되고 있다. SiC 전력용 반도체는 실리콘 반도체의 이론적 물성한계를 극복할 수 있는 소재로서 80년대 이후 각광받아 왔다. 하지만 대구경의 단결정 웨이퍼 및 저결함의 에피박막의 부재로 90년대 중반까지는 가능성 있는 재료로서만 연구되었다. 90년대 중반 단결정 웨이퍼가 상용화된 이후 단결정 웨이퍼의 대구경화 및 저결함화가 급속히 진전되어 전력용 반도체 소자의 개발도 활기를 띄게 되었다. 본 기고에서는 탄화규소 반도체소자의 기술동향에 대해 소개하고자 한다.

• KIEE International Transactions on Electrophysics and Applications
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• v.2C no.5
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• pp.258-261
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• 2002

Electrical forming dependent current-voltage (I-V) and numerically derived differential conductance(dI／dV) characteristics have been presented in the multi-layer nano-crystalline silicon／oxygen (no-Si／O) superlattice. Distinct staircase-like features, indicating the presence of resonant tunnel barriers, are clearly observed in the dc I-V characteristics. Also, all samples showed a continuous change in current and zero conductivity around OV corresponding to the Coulomb blockade in the calculated dI／dV-V curve. Also, Ra-man scattering measurement showed the presence of a nano-crystalline Si structure. This result becomes a step in the right direction for the fabrication of silicon-based optoelectronic and quantum devices as well as for the replacement of silicon-on-insulator (SOI) in high speed and low power silicon MOSFET devices of the future.

• Journal of the Korean Institute of Telematics and Electronics
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• v.25 no.7
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• pp.780-790
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• 1988

We have studied the hot-carrier-induced degradation caused by the high channel electric field due to the decrease of the gate length of MOSFET used in VLSI. Under DC stress, the condition in which maximum substrate current occures gave the worst degradation. Under AC dynamic stress, other conditions, the pulse shape and the falling rate, gave enormous effects on the degradation phenomena, especially at 77K. Threshold voltage, transconductance, channel conductance and gate current were measured and compared under various stress conditions. The threshold voltage was almost completely recovered by hot-injection stress as a reverse-stress. But, the transconductance was rapidly degraded under hot-hole injection and recovered by sequential hot-electron stress. The Si-SiO2 interface state density was analyzed by a charge pumping technique and the charge pumping current showed the same trend as the threshold voltage shift in degradation process.

• Proceedings of the KIEE Conference
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• 2006.10a
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• pp.147-148
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• 2006

Sl-Thyristor는 기존의 Power semlconductor인 단일 IGBT,MOSFET과 비교하여 높은 정격 전압과 대전류의 소호가 가능하며 빠른 turn on swithcing time을 가지는 특성이 있다. 하지만 게이트 드라이버를 이용한 Sl-Thyristor의 turn on 구동시에는 전압구동의 특성과 turn 0ff시에는 전류 구동의 특성에 가까운 구동 특성이 요구되기 때문에 스위칭 요구 특성에 맞는 게이트 드라이버의 설계 및 제어가 쉽지 않다. 본 논문은 펄스 파워 어플리케이션으로 Sl-Thyristor(PT-201 5kV/100A)를 사용하여 pulsed power moduiator용 Sl-Thyristor의 게이트 드라이버의 요구인 빠른 turn on switching 특성과 turn off 시 Si-Thyristor 내의 전하를 빨리 제거하기 위한 조건을 제시하고 있다.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.229-230
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• 2017

본 논문은 단상 3레벨 PFC 컨버터에 적용하는 두 가지 모듈레이션 기법에 따른 시스템 효율 및 스위치 발열을 비교하고, 열해석 시뮬레이션을 통한 열 분포에 대한 결과를 기반으로 적절한 방열기법 모색을 위한 근거자료를 제시한다. 제안하는 모듈레이션 기법을 통해, 주 스위치인 SiC MOSFET의 도통손실을 저감하여 시스템 효율을 향상시키며, 스위치에 발생하는 열을 저감시킨다. 앤시스 열해석 시뮬레이션을 통해 이를 확인하고, 실험을 통해 검증한다. 정격부하(5kW)에 대해 약 $27^{\circ}C$의 스위치 온도저감이 이루어졌으며, 전 부하(0.5kW ~ 5kW)에 걸쳐 약 1%의 효율이 향상되었음을 실험을 통해 확인하였다.

• Journal of the Korean Vacuum Society
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• v.17 no.3
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• pp.199-203
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• 2008

The effects of surface treatment by $O_2$ plasma on the Bio-FETs were investigated by using the pseudo-MOSFETs on the SOI substrates. After a surface treatment by $O_2$ plasma with different RF powers, the current-voltage and field effect mobility of pseudo-MOSFETs were measured by applying back gate bias. The subthreshold characteristics of pseudo-MOSFETs were significantly degraded with increase of RF power. Additionally, a forming gas anneal process in 2 % diluted $H_2/N_2$ ambient was developed to recover the plasma process induced surface damages. A considerable improvement of the subthreshold characteristics was achieved by the forming gas anneal. Therefore, it is concluded that the pseudo-MOSFETs are a powerful tool for monitoring the surface treatment of Bio-FETs and the forming gas anneal process is effective for improving the electrical characteristics of Bio-FETs.