• Solar Energy
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• v.17 no.4
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• pp.3-11
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• 1997

Because grain boundaries in polycrystalline silicon act as potential barriers and recombination centers for the photo-generated charge carriers, these defects degrade conversion effiency of solar cell. To reduce these effects of grain boundaries, we investigated various influencing factors such as thermal treatment, various grid pattern, selective wet etching for grain boundaries, buried contact metallization along grain boundaries, grid on metallic thin film. Pretreatment above $900^{\circ}C$ in $N_2$ atmosphere, gettering by $POCl_3$ and Al treatment for back surface field contributed to obtain a high quality poly-Si. To prevent carrier losses at the grain boundaries, we carried out surface treatment using Schimmel etchant. This etchant delineated grain boundaries of $10{\mu}m$ depth as well as surface texturing effect. A metal AI diffusion into grain boundaries on rear side reduced back surface recombination effects at grain boundaries. A combination of fine grid with finger spacing of 0.4mm and buried electrode along grain boundaries improved short circuit current density of solar cell. A ultra-thin Chromium layer of 20nm with transmittance of 80% reduced series resistance. This paper focused on the grain boundary effect for terrestrial applications of solar cells with low cost, large area, and high efficiency.

• Journal of Adhesion and Interface
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• v.25 no.2
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• pp.56-62
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• 2024

In this study, LiDAR-detectable black hollow-structured materials are synthesized using different reducing agents to evaluate their applicability to LiDAR sensor. Initially, white SiO₂/TiO₂ core/shell (WST) materials are fabricated via a sol-gel method, followed by a reduction using ascorbic acid (AA) and sodium borohydride (SB). After the reduction, subsequent etching of the SiO₂ core leads to the formation of two different black hollow-structured materials (AA-BHT and SB-BHT). The lightness (L^*) and near-infrared (NIR) reflectance (R%) of AA-BHT are measured as ca. 19.1 and 34.5 R%, and SB-BHT shows values of ca. 11.5 and 31.8 R%, respectively. While AA-BHT exhibits higher NIR reflectance compared to SB-BHT, it displays slightly lower blackness. Compared with core/shell structured materials, improved NIR reflectance of both AA-BHT and SB-BHT is attributed to the morphology of hollow- structured materials, which increase light reflection at the interface between air and black TiO₂ according to the Fresnel's reflection principle. Consequently, both AA-BHT and SB-BHT are effectively detected by the commercially available LiDAR sensors, validating their suitability as black materials for autonomous vehicle and environment.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.239-240
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• 2008

As semiconductor devices are scaled down for better performance and more functionality, the Cu-based interconnects suffer from the increase of the resistivity of the Cu wires. The resistivity increase, which is attributed to the electron scattering from grain boundaries and interfaces, needs to be addressed in order to further scale down semiconductor devices [1]. The increase in the resistivity of the interconnect can be alleviated by increasing the grain size of electroplating (EP)-Cu or by modifying the Cu surface [1]. Another possible solution is to maximize the portion of the EP-Cu volume in the vias or damascene structures with the conformal diffusion barrier and seed layer by optimizing their deposition processes during Cu interconnect fabrication, which are currently ionized physical vapor deposition (IPVD)-based Ta/TaN bilayer and IPVD-Cu, respectively. The use of in-situ etching, during IPVD of the barrier or the seed layer, has been effective in enlarging the trench volume where the Cu is filled, resulting in improved reliability and performance of the Cu-based interconnect. However, the application of IPVD technology is expected to be limited eventually because of poor sidewall step coverage and the narrow top part of the damascene structures. Recently, Ru has been suggested as a diffusion barrier that is compatible with the direct plating of Cu [2-3]. A single-layer diffusion barrier for the direct plating of Cu is desirable to optimize the resistance of the Cu interconnects because it eliminates the Cu-seed layer. However, previous studies have shown that the Ru by itself is not a suitable diffusion barrier for Cu metallization [4-6]. Thus, the diffusion barrier performance of the Ru film should be improved in order for it to be successfully incorporated as a seed layer/barrier layer for the direct plating of Cu. The improvement of its barrier performance, by modifying the Ru microstructure from columnar to amorphous (by incorporating the N into Ru during PVD), has been previously reported [7]. Another approach for improving the barrier performance of the Ru film is to use Ru as a just seed layer and combine it with superior materials to function as a diffusion barrier against the Cu. A RulTaN bilayer prepared by PVD has recently been suggested as a seed layer/diffusion barrier for Cu. This bilayer was stable between the Cu and Si after annealing at $700^{\circ}C$ for I min [8]. Although these reports dealt with the possible applications of Ru for Cu metallization, cases where the Ru film was prepared by atomic layer deposition (ALD) have not been identified. These are important because of ALD's excellent conformality. In this study, a bilayer diffusion barrier of Ru/TaCN prepared by ALD was investigated. As the addition of the third element into the transition metal nitride disrupts the crystal lattice and leads to the formation of a stable ternary amorphous material, as indicated by Nicolet [9], ALD-TaCN is expected to improve the diffusion barrier performance of the ALD-Ru against Cu. Ru was deposited by a sequential supply of bis(ethylcyclopentadienyl)ruthenium [Ru$(EtCp)_2$] and $NH_3$plasma and TaCN by a sequential supply of $(NEt_2)_3Ta=Nbu^t$ (tert-butylimido-trisdiethylamido-tantalum, TBTDET) and $H_2$ plasma. Sheet resistance measurements, X-ray diffractometry (XRD), and Auger electron spectroscopy (AES) analysis showed that the bilayer diffusion barriers of ALD-Ru (12 nm)/ALD-TaCN (2 nm) and ALD-Ru (4nm)/ALD-TaCN (2 nm) prevented the Cu diffusion up to annealing temperatures of 600 and $550^{\circ}C$ for 30 min, respectively. This is found to be due to the excellent diffusion barrier performance of the ALD-TaCN film against the Cu, due to it having an amorphous structure. A 5-nm-thick ALD-TaCN film was even stable up to annealing at $650^{\circ}C$ between Cu and Si. Transmission electron microscopy (TEM) investigation combined with energy dispersive spectroscopy (EDS) analysis revealed that the ALD-Ru/ALD-TaCN diffusion barrier failed by the Cu diffusion through the bilayer into the Si substrate. This is due to the ALD-TaCN interlayer preventing the interfacial reaction between the Ru and Si.

• The Journal of Korean Academy of Prosthodontics
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• v.46 no.5
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• pp.520-527
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• 2008

Purpose: This study was conducted to evaluate the shear bond strength of composite resin to dentin when etched with laser instead of phosphoric acid. Material and methods: Recently extracted forty molars, completely free of dental caries, were embedded into acrylic resin. After exposing dentin with diamond saw, teeth surface were polished with a series of SiC paper. The teeth were divided into four groups composed of 10 specimens each; 1) no surface treated group as a control 2) acid-etched with 35%-phosphoric acid 3) Er:YAG laser treated 4) Er,Cr:YSGG laser treated. A dentin bonding agent (Adapter Single Bond2, 3M/ESPE) was applied to the specimens and then transparent plastic tubes (3 mm of height and diameter) were placed on each dentin. The composite resin was inserted into the tubes and cured. All the specimens were stored in distilled water at $37^{\circ}C$ for 24 hours and the shear bond strength was measured using a universal testing machine (Z020, Zwick, Germany). The data of tensile bond strength were statistically analyzed by one-way ANOVA and Duncan's test at ${\alpha}$= 0.05. Results: The bond strengths of Er:YAG laser-treated group was $3.98{\pm}0.88$ MPa and Er,Cr:YSGG laser-treated group showed $3.70{\pm}1.55$ MPa. There were no significant differences between two laser groups. The control group showed the lowest bond strength, $1.52{\pm}0.42$ MPa and the highest shear bond strength was presented in acid-etched group, $7.10{\pm}1.86$ MPa (P < .05). Conclusion: Laser-etched group exhibited significantly higer bond strength than that of control group, while still weaker than that of the phosphoric acid-etched group.

• Applied Chemistry for Engineering
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• v.25 no.5
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• pp.447-454
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• 2014

Organic solar cells (OSCs) have intensively studied in recent years due to their advantages such as cost effectiveness and possibility of applications in flexible devices. In spite of the high power conversion efficiency (PCE) of 10 %, the OSCs still have a draw back of their low environmental stability due to the oxidization of aluminum cathode and etching of transparent conducting oxide as electrode. To solve these problems, the inverted structured OSCs (I-OSCs) having greatest potential for achieving an improvement of device performances are suggested. Therefore, there are a lot of studies to develope of interface layer based on organic/inorganic materials for the electron transport layer (ETL) and passivation layer, significant advancements in I-OSCs have driven the development of interface functional materials including electron transport layer. Recent efforts to employing 2D/3D zinc oxide (ZnO) based ETL into I-OSCs have produced OSCs with a power conversion efficiency level that matches the efficiency of ~9 %. In this review, the technical issues and recent progress of ZnO based ETL in I-OSCs to enhancement of device efficiency and stability in terms of materials, process and characterization have summarized.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.8-13
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• 2001

Cerium oxide ($CeO_2$) thin film has been proposed as a buffer layer between the ferroelectric thin film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS) structures for ferroelectric random access memory (FRAM) applications. In this study, $CeO_2$ thin films were etched with $Cl_2$/Ar gas mixture in an inductively coupled plasma (ICP). Etch properties were measured for different gas mixing ratio of $Cl_2$($Cl_2$+Ar) while the other process conditions were fixed at RF power (600 W), dc bias voltage (-200 V), and chamber pressure (15 mTorr). The highest etch rate of $CeO_2$ thin film was 230 ${\AA}$/min and the selectivity of $CeO_2$ to $YMnO_3$ was 1.83 at $Cl_2$($Cl_2$+Ar gas mixing ratio of 0.2. The surface reaction of the etched $CeO_2$ thin films was investigated using x-ray photoelectron spectroscopy (XPS) analysis. There is a Ce-Cl bonding by chemical reaction between Ce and Cl. The results of secondary ion mass spectrometer (SIMS) analysis were compared with the results of XPS analysis and the Ce-Cl bonding was monitored at 176.15 (a.m.u). These results confirm that Ce atoms of $CeO_2$ thin films react with chlorine and a compound such as CeCl remains on the surface of etched $CeO_2$ thin films. These products can be removed by Ar ion bombardment.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.287.1-287.1
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• 2016

Three-dimensional (3-D) semiconductor nanoarchitectures, including nano- and micro- rods, pyramids, and disks, are emerging as one of the most promising elements for future optoelectronic devices. Since these 3-D semiconductor nanoarchitectures have many interesting unconventional properties, including the use of large light-emitting surface area and semipolar/nonpolar nano- or micro-facets, numerous studies reported on novel device applications of these 3-D nanoarchitectures. In particular, 3-D nanoarchitecture devices can have noticeably different current spreading characteristics compared with conventional thin film devices, due to their elaborate 3-D geometry. Utilizing this feature in a highly controlled manner, color-tunable light-emitting diodes (LEDs) were demonstrated by controlling the spatial distribution of current density over the multifaceted GaN LEDs. Meanwhile, for the fabrication of high brightness, single color emitting LEDs or laser diodes, uniform and high density of electrical current must be injected into the entire active layers of the nanoarchitecture devices. Here, we report on a new device structure to inject uniform and high density of electrical current through the 3-D semiconductor nanoarchitecture LEDs using metal core inside microtube LEDs. In this work, we report the fabrications and characteristics of metal-cored coaxial $GaN/In_xGa_{1-x}N$ microtube LEDs. For the fabrication of metal-cored microtube LEDs, $GaN/In_xGa_{1-x}N/ZnO$ coaxial microtube LED arrays grown on an n-GaN/c-Al2O3 substrate were lifted-off from the substrate by wet chemical etching of sacrificial ZnO microtubes and $SiO_2$ layer. The chemically lifted-off layer of LEDs were then stamped upside down on another supporting substrates. Subsequently, Ti/Au and indium tin oxide were deposited on the inner shells of microtubes, forming n-type electrodes of the metal-cored LEDs. The device characteristics were investigated measuring electroluminescence and current-voltage characteristic curves and analyzed by computational modeling of current spreading characteristics.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.448-448
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• 2013

최근 생물학적 분석 기구에서 시료를 처리, 분리, 검출, 샘플링 또는 분석하기 위해 사용되는 마이크로펌프(Micropump)에 대한 관심이 높아지고 있다. 또한 전자소자의 성능과 신뢰성의 증진을 위한 전자소자의 열 문제를 해결하기 위해 냉각장치로 마이크로 펌프가 적용되기도 한다. 그 외에도 마이크로펌프는 다양한 분야에 응용이 가능하다. 마이크로펌프는 작동 방식에 따라 압전형, 공압형, 열공압형, 연동형 등의 여러 종류로 분류되고 있다. 그중에서도 최근에는 연동형 마이크로 펌프의 개발이 각광받고 있다. 기존의 연동형 펌프들은 다중 챔버를 가지고 있으며, 각각의 챔버 내에서 Dead volume이 많이 발생할 뿐만 아니라 이상적인 연동운동과는 차이가 많이 나는 문제점을 가지고 있다. 또한 압전방식과 열공압방식은 느린 응답성으로 인해 효율적인 유체 이동이 어렵다. 본 논문에서는 이상적인 연동운동을 구현하기 위하여 기존의 연동형 펌프의 단점을 보완하고, 하나의 챔버에 다중전극 구조를 가지는 정전기력방식의 연동형 펌프를 개발하였다. 정전기력방식으로 펌프를 구동함으로써, 저전력으로 펌프구동이 가능하며, 하나의 챔버에 다중전극을 설치함으로써 이상적인 연동운동을 재현하였다. 그리고 Dead volume을 최소화 하였다. 또한, 빠른 반응속도로 인해 효율적인 유체 이동을 실현시킬 수 있었다. 본 연구에서 제안된 마이크로 펌프의 구성은 크게 챔버, 박막, Inlet/outlet hole으로 구성되었다. 챔버는 Si-wafer에 wet etching 공정으로 제작 하였고 그 위에 알루미늄 박막을 200 nm 증착시켰다. 챔버는 가로 32 mm, 세로 5 mm, 깊이는 $15{\mu}m$, 부피는 $200{\mu}l$으로 제작되었다. 박막은 폴리이미드(polyimide)를 사용하여 $3{\mu}m$의 두께로 제작 되었으며, 폴리이미드 박막 사이에는 200 nm 두께의 4개의 알루미늄 박막 전극을 삽입시켰다. 삽입된 4개의 전극에 개별적인 전기신호를 보냄으로써 연동운동이 가능하다. Inlet/outlet hole은 직경 2 mm의 크기로 제작되었으며, 튜브를 연결하여 유체가 흐를 수 있는 체널을 형성하였다. 제작된 마이크로 펌프의 구동전압은 115 V이며, 인가되는 주파수를 1 Hz~100 KHz까지 변화시켜 유량을 측정하였다. 작동 유체는 공기이며, 유량측정은 튜브 내에 물방울을 삽입하여 시간에 따른 이동거리를 관측하였다. 측정결과 2.2 KHz에서 2.4 mm/min의 가장 높은 유량을 확인할 수 있었다. 본 연구를 통해 제안된 연동형 마이크로펌프는 이상적인 연동운동이 가능함으로써 기존의 연동형 방식의 문제점을 보완하였으며, 생명과학, 의학, 화학 등의 분야에서 적용이 가능하리라 기대된다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.416-417
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• 2013

최근 질화물계 발광다이오드(light emitting diode, LED) 소자는 핸드폰, 스마트 TV 등의 디스플레이 분야와 실내외조명, 감성조명, 특수조명 등의 조명분야에 그 응용분야가 급속히 확대되고 있다. 이러한 LED 소자는 에너지 절감과 친환경에 장점을 가지고, 가까운 미래에 조명시장을 대체할 것으로 예상된다. 이를 만족하기 위해서는 현재보다 더 높은 효율을 갖는 LED 개발이 요구되어지고 있는 상황이다. 일반적으로 질화물계 LED 소자의 효율은 내부양자 효율, 광추출 효율 등으로 나타낼 수 있다. 내부 양자효율은 성장된 결정의 질의 개선 및 다층의 이종접합 또는 다중양자우물 구조와 같이 활성층의 캐리어 농도를 높이는 접합구조로 설계되어 80% 이상의 효율을 나타낸다. 그러나 광추출 효율은 이에 미치지 못하고 있다. 이는 반도체 재료의 높은 굴절률로 인하여 빛이 외부로 탈출하지 못하고 내부로 반사되거나 물질 안에서 흡수가 일어나기 때문이다. 따라서 이러한 문제를 해결하기 위해 많은 연구 그룹들은, 표면에 패턴 형성하여 빛의 전반사를 줄여 그 효율을 올리는 연구결과를 보고하고 있다. 대표적인 방법으로는 wet etching, 전자빔 리소그라피, 나노임프린트 리소그라피, 레이저 홀로 리그라피, 나노스피어 리소그라피 등이 사용되고 있다. 이 중, 나노스피어 리소그라피는 폴리스틸렌 혹은 실리카 등과 같은 나노 크기의 bead를 사용하여 반도체 기판 표면에 단일층으로 고르게 코팅한 마스크로 사용하여 패턴을 주는 방법이다. 이 방법의 장점으로는 대면적에 균일한 패턴을 형성할 수 있고, 공정비용이 저렴하여 양산하기에 적합하다는 특징이 있다. 나노스피어 리소그라피를 통해서 표면에 생성된 패턴 모양의 각도에 따라서, 식각되는 깊이에 변화에 따라 실험한 결과들은 있지만, 아직까지 크기가 다른 나노입자들의 마스크 이용하여 형성된 패턴 밀도에 따른 광 추출 효과에 대한 연구가 많이 미흡하다. 따라서 본 연구에서는 다양한 크기의 실리카로 패턴을 형성시켜 패턴 밀도에 대한 광추출 효율의 효과에 대해서 조사하였다. 실험 방법으론, DI, 에탄올, TEOS, 암모니아의 순서대로 그 혼합 비율을 조정하여 100, 250, 500 nm 크기의 나노입자를 합성하였고 이것을 질화물계 LED의 표면 위에 단일층으로 스핀코팅 방법을 통해 코팅을 하였다. 그 후 ICP-RIE 방법으로 필라 패턴을 형성하였는데, 그 결과 100 nm SiO2 입자를 이용한 경우 $4.5{\times}10^9$/$cm^2$, 250 nm의 경우 $1.4{\times}10^9$/$cm^2$, 500 nm의 경우 $0.4{\times}10^9$/$cm^2$의 패턴의 밀도를 보여주었다(Fig. 1). 패턴의 밀도에 따라 전계광학적 특성을 확인하여 보았는데, 그 결과는 평평한 표면과 비교하였을 때 100 nm에서 383%, 250 nm에서는 320%, 500 nm에서는 244% 상승하는 결과를 보여주었다(Fig. 2). 이번 실험을 통해서 LED의 광추출 효율은 표면 모양과 깊이 뿐 아니라 밀도가 커질수록 그 효율이 올라간다는 사실을 알 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.