• Journal of the Korean Institute of Telematics and Electronics A
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• v.33A no.3
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• pp.96-106
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• 1996

One of the major problems for poly-Si TFTs is the large off state leakage current. LDD (lightly doped drain) and offset gated structures have been employed in order to reduce the leakage current. However, these structures also redcue the oN current significantly due to the extra series resistance caussed by the LDD or offset region. It is desirable to have a device which would have the properties of the offset gated structure in the OFF state, while behaving like a fully gated device in the oN state. Therefore, we propose a new thin film transistor with pnp junction gate which reduce the leakage curretn during the OFF state without sacrificing the ON current during the ON state.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.242-243
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• 2007

Highly transparent conducting aluminum-doped zinc oxide (AZO) thin films were deposited on Corning glass substrate using an Nd:YAG pulsed laser deposition technology. AZO thin films deposited with 650nm thickness showed the best electrical properties of the electrical resistivity of $4.6{\times}10^{-4}[{\Omega}{\cdot}cm]$, a carrier concentration of $9.3{\times}10^{20}[cm^{-3}]$, and a carrier mobility of $31[cm^2/V{\cdot}s]$. Besides, the optical transmittance spectra in visible region (200-800nm) of AZO thin films show an high average transmittance over 90%.

• Journal of the Korean Vacuum Society
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• v.22 no.5
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• pp.270-275
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• 2013

Single-layer graphene layers have been synthesized by using chemical vapor deposition, subsequently transferred on 300 nm $SiO_2/Si$ and quartz substrates, and doped with $AuCl_3$ by spin coating for various doping concentrations ($n_D$) from 1 to 10 mM. Based on the $n_D$-dependent variations of Raman frequencies/peak-intensity ratios, sheet resistance, work function, and Dirac point, measured by structural, optical, and electrical analysis techniques, the p-type nature of graphene is shown to be strengthened with increasing $n_D$. Especially, as estimated from the drain current-gate voltage curves of graphene field effect transistors, the hole mobility is very little varied with increasing $n_D$, in strong contrast with the $n_D$-dependent large variation of electron mobility. These results suggest that $AuCl_3$ is one of the best p-type dopants for graphene and is promising for device applications of the doped graphene.

• Journal of Magnetics
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• v.14 no.4
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• pp.161-164
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• 2009

Iron-doped $Sn_{1-x}Fe_xO_2$ (x = 0.0, 0.05, 0.1, 0.2, 0.33) thin films on Si(100) substrates and powders were prepared by a chemical solution process. The x-ray diffraction (XRD) patterns of the $Sn_{1-x}Fe_xO_2$ thin films and powders showed a polycrystalline rutile tetragonal structure. Thermo gravimetric (TG) - differential thermal analysis (DTA) showed the final weight loss above $430{^{\circ}C}$ for all powder samples. According to XRD Rietveld refinement of the powders, the lattice parameters and unit cell volume decreased with increasing Fe content. The magnetic properties were characterized using a vibrating sample magnetometer (VSM) and M$\ddot{o}$ssbauer spectroscopy. The thin film samples with x = 0.1 and 0.2 showed paramagnetic properties but thin films with x = 0.33 exhibited ferromagnetic properties at room temperature. Mossbauer studies revealed the $Fe^{3+}$ valence state in the samples. The ferromagnetism in the samples can be interpreted in terms of the direct ferromagnetic coupling of ferric ions via an electron trapped in a bridging oxygen deficiency, which can be explained using the F-center exchange model.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.10a
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• pp.16.2-16.2
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• 2011

Graphene has attracted significant attention due to its unique characteristics and promising nanoelectronic device applications. For practical device applications, it is essential to synthesize high-quality and large-area graphene films. Graphene has been synthesized by eloborated mechanical exfoliation of highly oriented pyrolytic graphite, chemical reduction of exfoliated grahene oxide, thermal decomposition of silicon carbide, and chemical vapor deposition (CVD) on metal substrates such as Ni, Cu, Ru etc. The CVD has advantages over some of other methods in terms of mass production on large-areas substrates and it can be easily separated from the metal substrate and transferred to other desired substrates. Especially, plasma-enhanced CVD (PECVD) can be very efficient to synthesize high-quality graphene. Little information is available on the synthesis of graphene by PECVD even though PECVD has been demonstrated to be successful in synthesizing various carbon nanostructures such as carbon nanotubes and nanosheets. In this study, we synthesized graphene on $Ni/SiO_2/Si$ and Cu plate substrates with CH4 diluted in $Ar/H_2$ (10%) by using an inductively-coupled PECVD (ICPCVD). High-quality graphene was synthesized at as low as $700^{\circ}C$ with 600 W of plasma power while graphene layer was not formed without plasma. The growth rate of graphene was so fast that graphene films fully covered on substrate surface just for few seconds $CH_4$ gas supply. The transferred graphene films on glass substrates has a transmittance at 550 nm is higher 94%, indicating 1~3 monolayers of graphene were formed. FETs based on the grapheme films transferred to $Si/SiO_2$ substrates revealed a p-type. We will further discuss the synthesis of graphene and doped graphene by ICPVCD and their characteristics.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.165-170
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• 2018

In this study, double-layered TCO (transparent conductive oxide) films were produced by depositing two distinct TCO materials: $SnO_2$ works as an n-type layer and ITO (indium-doped tin oxide) serves as a transparent conductor. Both transparent conductive oxide-films were sequentially deposited by sputtering. The electrical and optical properties of single-layered TCO films ($SnO_2$) and double-layered TCO ($ITO/SnO_2$) films were investigated. A TCO-embedding photodetector was realized through the formation of an $ITO/SnO_2/p-Si/Al$ layered structure. The remarkably high rectifying ratio of 400.64 was achieved with the double-layered TCO device, compared to 1.72 with the single-layered TCO device. This result was attributed to the enhanced electrical properties of the double-layered TCO device. With respect to the photoresponses, the photocurrent of the double-layered TCO photodetector was significantly improved: 1,500% of that of the single-layered TCO device. This study suggests that, due to the electrical and optical benefits, double-layered TCO films are effective for enhancing the photoresponses of TCO photodetectors. This provides a useful approach for the design of photoelectric devices, including solar cells and photosensors.

• Journal of the Korean Ceramic Society
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• v.39 no.4
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• pp.394-400
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• 2002

Tin oxide thin films doped with silicon as anodes for lithium secondary battery were fabricated by R. F. magnetron sputtering technique. The electrochemical results for lithium secondary battery anodes showed that addition of silicon decreases the oxidic state of tin, and, hence, reduced the irreversible capacity during the first discharge/charge cycle. The (110),(101),(211) planes were grown with increasing substrate temperatures. The reversible capacity of thin films fabricated in conditions of $300^{\circ}C$ substrate temperature and 7:3 $Ar:O_2$ ratio was 700 mAh/g.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.447-447
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• 2013

최근 전자산업의 발전으로 차세대 디스플레이 소자로 산화물반도체가 주목받고 있다. 산화물 반도체는 저온공정, 높은 이동도 및 투과율을 가지기 때문에 이러한 공정이나 물성 측면에 있어 기존의 a-Si, LTPS 등을 대채할 만한 소자로서 연구가 활발이 이루어지고 있다. 특히 고해상도 및 고속구동이 진행됨에 따라 높은 이동도의 필요성이 대두되고 있다. 본 연구에서는 IGZO 산화물 반도체 박막트랜지스터의 이동도 개선을 위해 나노입자를 사용하였다. 게이트전극으로 사용된 Heaviliy doped P-type Si 기판위에 200 nm의 SiO2 절연층을 성장시킨 후, 채널로 작동하기 위한 IGZO 박막을 증착하기 전에 10~20 nm 크기의 니켈, 금 나노입자를 부착시켰다. 열처리 온도는 $350^{\circ}C$, 90분동안 진행하였고, 100 nm의 알루미늄 전극을 증착시켜 TFT 소자를 제작하였다. TFT 소자가 동작할 시, IGZO 박막 내부의 전자들은 게이트 전압으로 인해 하부로 이동하여 채널을 형성, 동시에 드레인 전압으로 인한 캐리어들의 움직임으로 인해 소자가 동작하게 된다. 본 연구에서는 채널이 형성되는 계면 부근에 전도성이 높은 금속 나노입자를 부착시켜 다수 캐리어인 전자가 채널을 통과할 때 전류흐름에 금속 나노입자들이 기여하여 전기적 특성의 변화에 어떠한 영향을 주는지 연구하였다. 반응시간을 조절하여 기판에 붙는 나노입자의 밀도 변화에 따른 특성과 다양한 크기(5, 10, 20 nm)를 갖는 금, 니켈 나노입자를 포함한 IGZO TFTs 소자를 제작하여 전달특성, 출력특성의 변화를 비교하였고, 실질적인 채널길이의 감소효율과 캐리어 이동도의 변화를 비교분석 하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.985-988
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• 2004

The carrier lifetime of boron doped Cz silicon samples after light induced degradation could be improved by optimized rapid thermal processing (RTP). The important five different parameters varied in order to investigate which parameter is important for the stable lifetime after light induced degradation, $\tau_d$. The Plateau temperature and the Plateau time influenced on the lifetime after light induced degradation. Especially, the Plateau temperature showed a strong influence on the stable lifetime. The optimal plateau temperature is approximately $900^{\circ}C$ t for a plateau time of 120 s. The stable lifetime increased from $15\mu}s$ to $25.5{\mu}s$. The normalized defect concentration, $N_t^*$, decreased from $0.06{\mu}s^{-1}$ to $0.037{\mu}s^{-1}$ by RTP-process.

• Korean Journal of Materials Research
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• v.26 no.11
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• pp.635-643
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• 2016

Graphene has shown exceptional properties for high performance devices due to its high carrier mobility. Of particular interest is the potential use of graphene nanoribbons as field-effect transistors. Herein, we introduce a facile approach to the fabrication of graphene nanoribbon (GNR) arrays with ~200 nm width using nanoimprint lithography (NIL), which is a simple and robust method for patterning with high fidelity over a large area. To realize a 2D material-based device, we integrated the graphene nanoribbon arrays in field effect transistors (GNR-FETs) using conventional lithography and metallization on highly-doped $Si/SiO_2$ substrate. Consequently, we observed an enhancement of the performance of the GNR-transistors compared to that of the micro-ribbon graphene transistors. Besides this, using a transfer printing process on a flexible polymeric substrate, we demonstrated graphene-silicon junction structures that use CVD grown graphene as flexible electrodes for Si based transistors.