• 한국전기전자재료학회논문지
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• 제29권7호
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• pp.424-428
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• 2016

In this paper, the power burden of High-TC superconducting (HTSC) module comprising the flux-lock type superconducting fault current limiter (SFCL) with two triggering currents during the fault period was analyzed. The short-circuit tests for the simulated power system with the SFCL in the different fault positions, which were expected to affect the amplitude of the fault current, were carried out. Through the comparative analysis on the power burden of the HTSC modules, the proposed flux-lock type SFCL was confirmed to be effective to divide into two power burdens according to the amplitude of the fault currents.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 B
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• pp.1089-1090
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• 2006

This paper analyzes impedance convergence characteristics and harmonics of electric locomotives operation and fault condition. To simulate the various fault and operation condition, AT feeding system and various locomotives are modeled using PSCAD/EMTDC. Analysis shows that impedance are converged into protection area in the case of short fault between catenary and rail or catenary and feeder line but in the case of disconnection fault, impedance is rater bigger so protective relay can't detect the fault. Therefore more analysis of overload and high impedance fault caused disconnection fault is needed.

• 대한전기학회논문지:전력기술부문A
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• 제54권1호
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• pp.25-30
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• 2005

An accurate digital distance relaying algorithm which is immune to mutual coupling effect and reactance effect of the fault resistance and the load current for the line faults in 765kV untransposed transmission lines is proposed. The algorithm can estimate adaptively the impedance to a fault point independent of the fault resistance. To compensate the magnitude and phase of the apparent impedance, this algorithm uses the angle of an impedance deviation vector. The impedance correction algorithm for phase-to-ground fault and phase-to-phase short fault use a voltage equation at fault point to compensate the fault current at fault point. A series of tests using EMTP output data in a 765kV untransposed transmission lines have proved the accuracy and effectiveness of the proposed algorithm.

• 전기학회논문지
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• 제66권2호
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• pp.394-401
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• 2017

Fault diagnosis is important due to the increasing demand of using interior permanent magnet synchronous machines (IPMSMs). In particular, an interturn fault is one of the most frequent electrical faults in IPMSMs. This paper proposes a fault indicator for diagnosis of interturn faults in IPMSMs. The fault indicator is developed by negative-sequence impedance. The effectiveness of the fault indicator to diagnose interturn faults was verified through various fault conditions.

• 한국전기전자재료학회논문지
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• 제18권9호
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• pp.851-855
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• 2005

We investigated the unbalanced characteristics of the superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased about 6 times of transport currents after the fault onset but was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unbalanced rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unbalanced rates of currents were noticeably improved within one cycle after the fault onset. We calculated the zero phase currents for a single line-to-ground fault using the balanced component analysis. The positive sequence resistance was reduced remarkably right after the fault onset but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase balanced state in about 60 ms after the fault onset at the three-phase system.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2003년도 학술대회논문집
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• pp.279-281
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• 2003

We analysed the operating properties of resistive type superconducting fault current limiters (SFCLs) based on YBCO thin films with a single line-to-ground fault. When a single line-to-ground fault occurred, the short circuit current of a fault phase increased up to about 6 times of transport currents immediately after the fault instant and was effectively limited to the designed current level within 2 ms by the resistance development of the SFCL. The fault currents of the sound phases almost did not change because of their direct grounding system. The unsymmetrical rates of a fault phase were distributed from 6.4 to 1.4. It was found that the unsymmetrical rates of currents were noticeably improved within one cycle after the fault instant. We calculated the zero phase currents for a single line-to-ground fault using the symmetrical component analysis. The positive sequence resistance was reduced remarkably right after the fault but eventually approached the balanced positive resistance component prior to the system fault. This means that the system reaches almost the three-phase symmetrical state in about 60 ㎳ after the fault. The ground currents were almost 3 times of the zero phase mts since most of the fault currents flowed through the grounding line.

• 한국정보통신학회논문지
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• 제16권2호
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• pp.313-318
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• 2012

본 논문에서는 $30{\mu}m$ 이하의 초 미세 피치를 가진 칩 온 필름(chip-on-film, COF)에서 자주 발생하는 결함을 자동으로 검출할 수 있는 시스템을 제안한다. 개발된 시스템은 초 미세 패턴의 개방 및 단락 결함 뿐만아니라 소프트 개방 및 소프트 단락을 신속히 검출할 수 있는 회로 및 기술이 적용되어 있다. 결함 검출의 기본 원리는 결함 전의 패턴 저항값과 결함 후의 패턴 저항값 차에 의해 발생하는 미세 차동 전압을 읽어서 결함 유무를 판단한다. 또한 미세전압 차를 증폭시켜 결함 유무를 쉽게 판단할 수 있도록 고주파 공진기를 이용한다. 제안된 시스템은 초미세 패턴 COF 검사 과정에서 발생하는 다양한 결함을 신속하고 정확히 검출할 수 있으므로 기존의 COF 검사 시스템의 대안이 될 것으로 기대한다.

• 한국전기전자재료학회논문지
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• 제26권2호
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• pp.134-139
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• 2013

When the accident occurred in power distribution system, it needs to control efficiently the fault current according to the fault angle and location. The flux-lock type superconducting fault current limiters (SFCL) can quickly limit when the short circuit accidents occurred and be made the resistance after the fault current. The flux-lock type SFCL has a single triggering element, detects and limits the fault current at the same time regardless of the size of the fault current. However, it has a disadvantage that broken the superconductor element. If the flux-lock type SFCL has separated structure of the triggering element and the limiting element, when large fault current occurs, it can reduce the burden of power and control fault current to adjust impedance. In this paper, this system is composed by triggering element and limiting element to analyze operation of limiting current. When the fault current occurs, we analyzed the limiting and operating current characteristics of the two triggering current level, and the compensation characteristics of bus-voltage sag according to the fault angle and location.

• Journal of Power Electronics
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• 제16권3호
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• pp.1097-1109
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• 2016

Fault detection and isolation are related to system monitoring, identifying when a fault has occurred, and determining the type of fault and its location. Fault detection is utilized to determine whether a problem has occurred within a certain channel or area of operation. Fault detection and diagnosis have become increasingly important for many technical processes in the development of safe and efficient advanced systems for supervision. This paper presents an integrated technique for fault diagnosis and classification for open- and short-circuit faults in three-phase inverter circuits. Discrete wavelet transform and principal component analysis are utilized to detect the discontinuity in currents caused by a fault. The features of fault diagnosis are then extracted. A fault dictionary is used to acquire details about transistor faults and the corresponding fault identification. Fault classification is performed with a fuzzy logic system and relevance vector machine (RVM). The proposed model is incorporated with a set of optimization techniques, namely, evolutionary particle swarm optimization (EPSO) and cuckoo search optimization (CSO), to improve fault detection. The combination of optimization techniques with classification techniques is analyzed. Experimental results confirm that the combination of CSO with RVM yields better results than the combinations of CSO with fuzzy logic system, EPSO with RVM, and EPSO with fuzzy logic system.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 제37회 하계학술대회 논문집 C
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• pp.1540-1541
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• 2006

For limitation and interruption of short circuit currents from low voltage to extra high voltage applications, the electrical equipment including fuses and circuit breakers, are widely used today. But in order to anticipate increasing needs for effective and competitive device for limiting the growing fault current in electrical power systems, fault current limitation technologies and fault current limitation devices are widely introduced and investigated in these days. Fault current limiters are emerging electric equipment which is under development using various methods including superconducting fault current limiter, solid state fault current limiter, arc driving fault current limiters. And these various methods have some advantages and disadvantages to take into considerations In order to commercialize fault current limiters in the electrical networks, a lot of discussions should be given on the point that fault current limiting methods, need for fault current limiters, coordination with existing protective system, and field experience before commercialization. In this paper, recent trends of fault current limiting technologies will be reviewed and the key issues of superconducting fault current limiters will be dealt with. And finally, future applications of superconducting fault current limiters would be discussed.