• The Transactions of the Korean Institute of Electrical Engineers P
• /
• v.59 no.4
• /
• pp.473-476
• /
• 2010

In this paper, we analyzed the short circuit current of a low voltage direct current distribution system. For the analysis, we performed the modeling of the low voltage direct current distribution system with a 6-pulse three-phase thyristor rectifier using the PSCAD/EMTDC, surveyed impedance of sources, transformers and distribution lines to run a simulation. A result of the simulation is that short circuit currents of the direct current distribution system with the rectifier decreased due to a thyristor-ON-resistance(Ron). But in case of the low thyristor-ON resistance, output fault current of the rectifier increased over three-phase short circuit current of an AC power system without a rectifier by regular ratio of the rectifier. Because the output fault current of the rectifier can increase over interrupting the capacity of circuit breakers, studying short circuit currents of a low voltage direct current distribution system with a rectifier is necessary for introducing the direct current distribution systems.

• Journal of Electrical Engineering and Technology
• /
• v.10 no.1
• /
• pp.47-55
• /
• 2015

This paper proposes the installation of a new modular multilevel converter based high-voltage direct current (MMC-HVDC) system to connect between mainland and Jeju island power systems in Korea in 2020. The purpose is to combine with two old line-commutated converters (LCC)-based HVDC system to achieve a stability of the Jeju island power system. The operation of the overall system will be analyzed in three cases: (i) wind speed is variable, (ii) either one of the LCC-HVDC systems is shutdown because of a fault or overhaul, (iii) a short circuit fault occurs at the mainland side. The effectiveness of the proposed control method is confirmed by the simulation results based on a PSCAD/EMTDC simulation program.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.67 no.5
• /
• pp.626-634
• /
• 2018

These days, widespread use of sensitive loads and distributed generators makes static transfer switch (STS) an essential component in power circuits to achieve a good power quality for AC Grids. In case of a short-circuit fault, previous STS cannot break the fault current. However, the proposed STS has the capability of breaking it quickly as a circuit breaker. Also if there are power quality problems such as Sag/Swell, the proposed STS can quickly transfers the load to the good quality source. Furthermore it is proved that the transfer time of the proposed STS is within one half of period of 3-phase source frequency regardless of the type of load. It is anticipated that the proposed STS may be utilized to realize many stable and reliable AC grid systems.

• Journal of the Korean Institute of Telematics and Electronics A
• /
• v.31A no.10
• /
• pp.173-184
• /
• 1994

BiCMOS circuits mixed with CMOS and bipolar technologies show peculiar fault characteristics that are different from those of other technoloties. It has been reported that because most of short faults in BiCMOS circuits cause logically intermediate level at outputs, current monitoring method is required to detect these faluts. However current monitoring requires additional hardware capabilities in the testing equipment and evaluation of test responses can be more difficult. In this paper, we analyze the characteristics of faults in BiCMOS circuit together with their test methods and propose a new design technique for testability to detect the faults by logic monitoring. An effective method to detect the transition delay faults induced by performance degradation by the open or short fault of bipolar transistors in BiCMOS circuits is presented. The proposed design-for-testability methods for BiCMOS circuits are confirmed by the SPICE simulation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.20 no.10
• /
• pp.889-894
• /
• 2007

We investigated the quench velocity of superconducting fault current limiter (SFCL) dependent on the source voltage. $YBa_2Cu_3O_7$ (YBCO) thin film was used as the current limiting element for SFCL. The analysis on the quench velocity of SFCL is essential to determine the capacity of circuit breaker (CB) or coordinate with CB. Generally, the quench velocity of SFCL is related with the short-circuit current. To change the short-circuit current, in this paper, the amplitude of the power source voltage is adjusted. Through the fault current limiting experiments, the quench velocity of SFCL was confirmed to increase fast as the source voltage increased. On the other hand, the peak limited current was shown to increase with steady rate of increase.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
• /
• 2003.10a
• /
• pp.205-208
• /
• 2003

Maximum short circuit current of modern power system is becoming so large that the current should transmission capability. Although there are various kinds of method to solve this, approached from super conductivity Fault Current Limiter application viewpoint among them. High Temperature Superconductor-Fault Current Limiter (HTS-FCL) development is progressing according to HTS technology development, and system application is tried. For actual system application of such super conductivity FCL, an efficient method to find FCL locations suitable for reduction of short circuit currents of more than one fault location is developed.

• The Transactions of the Korean Institute of Electrical Engineers
• /
• v.39 no.1
• /
• pp.10-15
• /
• 1990

This paper presents an algorithm that can compute equivalent impedance effctively in computing 3-phase short circuit current which would be generated in power systems. Also this paper proposes a method that can decide the capacity of circuit breaker by analysing the fault current distribution probabilistically when the fault point of specificed line varies. The efficiency of the algorithm was verified by applying the proposed method to IEEE-6bus system and IEEE-30bus system, and probabilistic fault analysing method is verified economic in facility investment by deciding the proper capacity of circuit breaker.

• The Transactions of the Korea Information Processing Society
• /
• v.6 no.5
• /
• pp.1203-1211
• /
• 1999

Checkpointing is the one of fault-tolerant techniques to restore faults and to restart job fast. Checkpointing algorithms in distributed systems have been studied for many years. These algorithms can be classified into synchronous Checkpointing algorithms and asynchronous Checkpoiting algorithms. In this paper, we propose an independent Checkpointing algorithm that has a minimum Checkpointing counts equal to periodic Checkpointing algorithm, and relatively short rollback distance at faulty situation. Checkpointing count is directly related to task completion time in a fault-free situation and short rollback distance is directly related to task completion time in a faulty situation. The proposed algorithm is compared with the previously proposed asynchronous Checkpointing algorithms using simulation. In the simulation, the proposed Checkpointing algorithm produces better results than other algorithms in terms of task completion time in fault-free as well as faulty situations.

• Proceedings of the KIEE Conference
• /
• 2003.11a
• /
• pp.321-323
• /
• 2003

Maximum short circuit current of modern power system is becoming so large that the current should transmission capability. Although there are various kinds of method to solve this, approached from super conductivity Fault Current Limiter application viewpoint among them. High Temperature Superconductor-Fault Current Limiter(HTS-FCL) development is progressing according to HTS technology development, and system application is tried. For actual system application of such super conductivity FCL, an efficient method to find FCL locations suitable for reduction of short circuit currents of more than one fault location is developed.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
• /
• 2003.11a
• /
• pp.111-116
• /
• 2003

Recently, power-electronics equipments or machine that microprocessor is included and computers have been installed continuously in industrial process or region of electronics customer. So concern for power quality, especially sags has been increased. Because those equipments are very sensitive to sags. The sag is phenomenon that magnitude of load voltage temporarily decreases because of power system fault. If a certain equipment in industrial process have any trouble result from sag, it can cause utility to be charged for enormous economics loss. Therefore it need to analyze the characteristic of sag and then mitigation method for sags in distribution system in oder to increase reliability. This paper gives an overview of sags characteristic due to short circuit fault in distribution system and after a general discussion of the various forms mitigation, gives a sags mitigation method with concentrating on mitigation-device interface method, especially FCL that is Fault Current Limiter.