• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.28-29
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• 2006

When photovoltaic module is used for a long time, its performance decreases due to several reasons. In this paper, we focus on the possibilities mainly contributing to the degraded efficiency of the polycrystalline silicon photovoltaic modules. The analysis is based on the modules that have been used for 15 years. These are two main reasons that cause the efficiency degradation, the corrosion and thermal decomposition. The former phenomenon of electrode is mainly due to the moisture from damaged back sheet in some module. However the other reason of the degraded efficiency comes from the thermal decomposition, which can not be observed from the outside but only by experiment. In this study, the comparison between the efficiency of normal modules and degradation modules is presented. Module having degraded cell was seen to cause increase of series resistance by about 80%, in comparison to normal samples efficiency which reduce by about 20%. This study shows that the effects of series resistances on module performance are critical. These effects must be understood and taken into consideration when analyzing performance degradation.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.268-268
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• 2010

The performance dependence of the P3HT:PCBM based bulk hetero-junction (BHJ) organic solar cells (OSCs) on the electrical and the optical properties of amorphous InZnSnO (a-IZTO) electrodes as a difference in film thicknesses are examined. With an increasing of the a-IZTO thickness, the series resistance ($R_{series}$) of the OSCs is reduced because of the reduction of sheet resistance ($R_{sheet}$) of a-IZTO electrodes. Additionally, It was found that the photocurrent density ($J_{sc}$) and the fill factor (FF) in OSCs are mainly affected by the electrical conductivity of the a-IZTO anode films rather than the optical transparency at thinner a-IZTO films. On the other hand, despite the much lower $R_{series}$ comes from thicker anode films, the dominant factor affecting the $J_{sc}$ became average optical transmittance of a-IZTO electrodes as well as power conversion efficiency (PCE) in same device configuration due to the thick anode films had as sufficiently low $R_{sheet}$ to extract the hole carrier from the active material.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.58 no.2
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• pp.207-213
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• 2009

Electrolytic capacitors have been widely used in power electronics system because of the features of large capacitance, small size, high-voltage, and low-cost. Electrolytic capacitors, which is most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. Therefore it is important to estimate the parameter of an electrolytic capacitor to predict the failure. This paper proposed a novel fault diagnosis method of an electrolytic capacitor used for voltage smoothing in boost DC converter. The equivalent series resistance(ESR) of electrolytic capacitor estimated from FFT result of filtered waveform of capacitor voltage/current. Main advantage of the proposed method include circuit simplicity and easy implementation. Simulation and experimental results are shown to verify the performance of the proposed method.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.59 no.1
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• pp.112-116
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• 2010

Fuel cell as a renewable energy source is clean and has a lot of advantages. The source can solve energy crisis and environmental problems such as greenhouse effect, air pollution and the ozone layer destruction. This paper introduces hybrid system(hydro-Genius Professional, heliocentris) of solar cell and fuel cell. Also, this paper shows the I-P, V-I characteristics of fuel cells which are connected in parallel and series. From these results, we also found the maximum power was transferred at 0.5[${\Omega}$]. The terminal voltage was also decreased according to the current because of the internal resistance. The power transfer in series was two times than that in parallel.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.5-6
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• 2006

There are typically applied on both rear and front sides of electrical contacts to the solar cell. The front contact formation is particularly sensitive to many parameters. Accordingly patterning of front grid line is an important factor of solar cells. This paper describe the electrical conversion efficiency, inclusive of shading loss that gives various spacing between front metal grid lines. In experiments with variation of spacing. It was verified that the wide spacing of grid fingers could increase the series resistance, also the narrow spacing of grid fingers also implies a grid with a higher density of grid fingers. The sunlight of incidence was more of reflection by grid fingers. In result, the short circuit current, which contribute to conversion efficiency was decreased, because maximum power input was reduced and increase the series resistance.

• Korean Journal of Materials Research
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• v.26 no.10
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• pp.556-560
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• 2016

Using current-voltage (I-V) and capacitance-voltage (C-V) measurements, the electrical properties of Au and Cu Schottky contacts to n-Ge were comparatively investigated. Lower values of barrier height, ideality factor and series resistance were obtained for the Au contact as compared to the Cu contact. The values of capacitance showed strong dependence on the bias voltage and the frequency. The presence of an inversion layer at the interface might reduce the intercept voltage at the voltage axis, lowering the barrier height for C-V measurements, especially at lower frequencies. In addition, a higher interface state density was observed for the Au contact. The generation of sputter deposition-induced defects might occur more severely for the Au contact; these defects affected both the I-V and C-V characteristics.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.5
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• pp.372-377
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• 2007

This paper proposes a novel fault diagnosis method of a electrolytic capacitor used for DC-link voltage smoothing in adjustable speed drives. The equivalent series resistance (ESR) of the electrolytic capacitor is directly estimated from DC-link voltage and load currents and the status of the electrolytic capacitor is determined from the estimated ESR. To compensate the variation of the ESR owing to temperature variation, diodes are located on the same PCB near the capacitor and the temperature of the capacitor is sensed indirectly from the voltage drop of diodes. Simulation and experimental studies show the effectiveness of the proposed method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.2
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• pp.235-238
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• 2008

This paper explores 28 nm MOSFET design for LSTP(Low Standby Power) applications using TCAD(Technology Computer Aided Design) simulation. Simulated results show that the leakage current of the MOSFET is increasingly dominated by GIDL(Gate Induced Drain Leakage) instead of a subthreshold leakage as the Source/Drain extension doping increases. The GIDL current can be reduced by grading lateral abruptness of the drain at the expense of a higher Source/Drain series resistance. For 28 nm MOSFET suggested in ITRS, we have shown Source/Drain design becomes even more critical to meet both leakage current and performance requirement.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.4
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• pp.607-612
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• 1994

The static and dynamic model of IGBT for the SPICE simulation has been successfully developed. The various circuit model parameters are extracted from the I-V and C-V characteristics of IGBT and implemented into our model. The static model of IGBT consists of the MOSFET, bipolar transistor and series resistance. The parameters to be extracted are the threshold voltage of MOSFET, current gain $\beta$ of bipolar transistor, and the series resistance. They can be extracted from the measured I-V characteristics curve. The C-V characteristics between the terminals are very important parameters to determine the turn-on and turn-off waveform. Especially, voltage dependent capacitance are polynomially approximated to obtain the exact turn-on and turn-off waveforms. The SPICE simulation results employing new model agree well with the experimental values.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.26-29
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• 1999

The I-V characteristics of the n-channel offset gated poly-Si TETs have been systematically investigated in order to analyse the effects of offset region. The on currents are reduced due to the series resistance by the offset length and there is no kink phenomenon in offset devices. The off currents of the offset gated TFTs are remarkably reduced to 10$^{-12}$ A independent of gate and drain voltage because the electric field is weakened by the increase of the depletion region width near the drain region. It is shown that the offset regions behave as a series resistance and reduce lateral and vertical electric field.