• JSTS:Journal of Semiconductor Technology and Science
• /
• v.3 no.1
• /
• pp.33-41
• /
• 2003

In this work, process optimization techniques for high frequency performance of HBTs are presented. The techniques are focused on reducing parasitic base resistance and base-collector capacitance, which are key elements determining the high frequency characteristics of HBTs. Several fabrication techniques, which can significantly reduce the parasitic elements of the HBTs for improved high frequency performance, are proposed and verified by the measured data of the fabricated devices.

• International Journal of Fuzzy Logic and Intelligent Systems
• /
• v.16 no.3
• /
• pp.208-215
• /
• 2016

The lithography hotspot detection process is crucial for semiconductor design development process. But, the lithography hotspot detection using optical simulation method takes much time and it slowdown the layout design development cycle. Though the geometry based approach is introduced as an alternative, it still revealed low detection performance and sophisticated framework. To solve this problem, we introduce a deep convolutional neural network based hotspot detection method. Our method made better results in ICCCAD 2012 dataset. To reach this score, we used lots of technical effort to improve the result in addition to just utilizing the nature of convolutional neural network. Inspection region reduction, data augmentation, DBSCAN clustering helped our work more stable and faster.

• Proceedings of the KIEE Conference
• /
• 2002.11a
• /
• pp.141-144
• /
• 2002

The method of the analysis of the base Gummel number of the PNP BJT(Bipolar Junction Transistor) for integrated circuits based upon the semiconductor physics is proposed and the method of calculating the doping profile of the base region using process conditions is presented. The transistor saturation current obtained from the proposed method of PNP BJT using 20V and 30V process shows an averaged relative error of 6.7% compared with the measured data.

• Journal of the Semiconductor & Display Technology
• /
• v.13 no.3
• /
• pp.7-11
• /
• 2014

The experimental analysis presented aims at the selection of the most optimal machining parameter combination for wire electrical discharge machining (WEDM) of STD11. Based on the Taguchi experimental design ($L_{27}$ orthogonal array) method, a series of experiments were performed by considering time-on, voltage, time-off, wire speed, and flow rate as input parameters. The surface roughness was considered responses. Based on the signal-to-noise (S/N) ratio, the influence of the input parameters on the responses was determined. The optimal machining parameters setting for the minimum surface roughness was found using Taguchi methodology. In order to investigate the effects of process parameters on the surface machined by WEDM, Several experiments are conducted to consider effects of time-on, voltage, time-off, wire speed and flow rate on the surface roughness. Analysis of variance (ANOVA) as well as regression analysis are performed on experimental data. The best results of surface roughness were obtained at higher voltage, lower wire speed, and lower time-on.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.15 no.6
• /
• pp.209-215
• /
• 2015

Following the semiconductor industry's growing, various types of toxic gases and caustic chemicals, HF(Hydrofluoric acid), HCI (Hydochloric acid), $H_2O_2$ (Hydrogen peroxide), $H_2SO_4$ (Sulfuric acid), and Piranha, were using on the semiconductor manufacturing process. Therefore many gas leakage accidents that produce huge losses of lives were caused by the processes. This research deeply considers two basic solutions that the necessity of MSDS education on university for reducing damage of lives and protecting life from chemical leak accidents such as a HF accident in Gumi, Korea and the use of GHS, REACH and the comprehension of propriety about using MSDS for keeping safety from conflagrations by released poison chemical materials.

• Journal of the Semiconductor & Display Technology
• /
• v.10 no.1
• /
• pp.91-94
• /
• 2011

This paper presents light transmission efficiency by optical adhesive thickness between MLA and aperture layer and by aperture hole size. The gap between MLA and Aperture layer is adjusted by the shim. The more optical adhesive thickness increases, the better light transmission efficiency increases up to a point. After that, the light transmission efficiency decreases because stray lights cannot transmit through the aperture layer owing to cut-off by aperture layer. And as a result of light transmission efficiency with changing aperture hole size, the light transmission efficiency is proportional to area of aperture hole. The more specified process is made, the better data and sample will be got.

• Journal of the Semiconductor & Display Technology
• /
• v.19 no.2
• /
• pp.92-95
• /
• 2020

In this paper, the new architecture of seizure prediction using CNN and LSTM and DWT was presented. In the proposed architecture, EEG data was labeled into a preictal and interictal section, and DWT was adopted to the preprocessing process to apply the characteristics of the time and frequency domain of the processed EEG signal. Also, CNN was applied to extract the spatial characteristics of each electrode used for EEG measurement, and LSTM neural network was applied to verify the logical order of the preictal section. The learning of the proposed architecture utilizes the CHB-MIT Scalp EEG dataset, and the sliding window technique is applied to balance the dataset between the number of interictal sections and the number of preictal sections. As a result of the simulation of the proposed architecture, a sensitivity of 81.22% and an FPR of 0.174 were obtained.

• Journal of the Semiconductor & Display Technology
• /
• v.21 no.2
• /
• pp.19-24
• /
• 2022

The purpose of this research is to determine the hardness of guide hole. A guide pin and a guide hole of SSD(Solid State Drive) tester used to mount SSD in a fixed position accurately. The guide pin and guide hole are worn by friction due to repeated operation, and the wear is concentrated on the guide hole made of weak material rather than the guide pin made of relatively strong material. Because of that reason, it is often overdesigned in the design stage because it can lose its function. If the guide hole is made soft, the manufacturing cost will decrease, but the accuracy will decrease due to wear caused by repeated friction. If the guide hole is manufactured excessively, the manufacturing process becomes complicated and the manufacturing cost increases. It is essential to design a guide hole, but since there is no standard or verified data that can be referenced, it is difficult to design. Experimental device which guides in the same way as the SSD tester is used for this research, and three types of anodizing state are experimented for different hardness. Also, weight of COK(Change over Kit) were analyzed by measuring the wear amount and state of the guide hole according to the number of repeated attachment and detachment.

• Journal of the Semiconductor & Display Technology
• /
• v.21 no.3
• /
• pp.50-56
• /
• 2022

In order to process a vast amount of data, there is demand for a new system with higher processing speed and lower energy consumption. To prevent 'memory wall' in von Neumann architecture, RRAM, which is a neuromorphic device, has been researched. In this paper, we summarize the features of RRAM and propose the device structure for characteristic improvement. RRAM operates as a synapse device using a change of resistance. In general, the resistance characteristics of RRAM are nonlinear and random. As synapse device, linearity and uniformity improvement of RRAM is important to improve learning recognition rate because high linearity and uniformity characteristics can achieve high recognition rate. There are many method, such as TEL, barrier layer, NC, high oxidation properties, to improve linearity and uniformity. We proposed a new device structure of TiN/Al doped TaO_x/AlO_x/Pt that will achieve high recognition rate. Also, with simulation, we prove that the improved properties show a high learning recognition rate.

• Journal of the Semiconductor & Display Technology
• /
• v.22 no.2
• /
• pp.35-39
• /
• 2023

Silicon oxide thin films have been deposited by plasma-enhanced chemical vapor deposition in SiH4 and N2O plasma along the variation of the gas flow ratio. Optical emission spectroscopy was employed to monitor the plasma and ellipsometry was employed to obtain refractive index of the deposited thin film. The atomic ratio of Si, O, and N in the film was obtained using XPS depth profiling. Fourier Transform Infrared Spectroscopy was used to analyze structures of the films. RI decreased with the increase in N2O/SiH4 gas flow ratio. We noticed the increase in the Si-O-Si bond angles as the N2O/SiH4 gas flow ratio increased, according to the analysis of the Si-O-Si stretching peak between 950 and 1,150 cm-1 in the wavenumber. We observed a correlation between the optical emission intensity ratio of (ISi+ISiH)/IO. The OES intensity ratio is also related with the measured refractive index and chemical composition ratio of the deposited thin film. Therefore, we report the added value of OES data analysis from the plasma related to the thin film characteristics in the PECVD process.