• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.5
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• pp.522-529
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• 2013

In this paper, simple but very effective techniques to suppress subthreshold hump effect for high-voltage (HV) complementary metal-oxide-semiconductor (CMOS) technology are presented. Two methods are proposed to suppress subthreshold hump effect using a simple layout modification approach. First, the uniform gate oxide method is based on the concept of an H-shaped gate layout design. Second, the gate work function control method is accomplished by local ion implantation. For our experiments, $0.18{\mu}m$ 20 V class HV CMOS technology is applied for HV MOSFETs fabrication. From the measurements, both proposed methods are very effective for elimination of the inverse narrow width effect (INWE) as well as the subthreshold hump.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.606-608
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• 1995

A thermally actuated micro-relay using a mercury-contact has been designed and fabricated. The mercury actuation was achieved by external nitrogen pressure and the mercury-contact was moved by actuation pressure of 110torr in the 100${\mu}m$ wide microchannel. The Injection pressure of mercury was 300torr in the 60${\mu}m$ wide microchannel of the micro relay structure.

• Korean Journal of Materials Research
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• v.3 no.2
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• pp.193-196
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• 1993

A procedure for preparing cross-sectional specimens for transmission electron microscopy(TEM)by focused ion beam(FIB)milling of specific regions of semiconductor devices is outlined. This technique enables TEM specimens to be pripared at precisely preselected area. In-situ #W thin film deposition on the top surface of desired site is complementally used to secure the TEM specimens to be less wedge shaped, which is main shortcoming of previous FIB-assisted TEM sample preparation technique. This technique is quite useful for the TEM sample priparation for fault finding and the characterization of fabrication process associated with submicron contact technologies.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.29 no.2
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• pp.208-216
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• 2019

Objective: The aim of this study is to control residual chemicals or by-products generated in chambers during preventive maintenance (PM) in the semiconductor manufacturing industry. We designed local exhaust ventilation using computational fluid dynamics (CFD). Methods: The air flow characteristics and capture efficiency between rectangular and slot hoods were compared numerically. The software Fluent 18.1 was used to estimate uniform velocity distribution and capture efficiency for contaminants. A metal from group 15 in the periodic table was released at the bottom of the chamber to simulate emissions. Results: The slot hood had a higher capture efficiency than a rectangular hood under the same conditions because the slot hood provided uniform air flow and higher face velocity. Also, there was no rotating swirl in the plenum for slot, that is why slot had better efficiency than rectangular even though they had similar face velocity. With less than 10 slots, the capture efficiencies for contaminants were nearly 95%. The optimum conditions for a hood to achieve high efficiency was 8 to 10 slots and a face velocity over 1 m/s. Conclusions: Well-designed ventilation systems must consider both efficiency and convenience. For this study, a slot hood that had high capture efficiency and no work disturbance was designed. This will contribute to protection of the worker's health in a PM area and other areas as well. Also, this study confirms the possibility of the application CFD in the semiconductor fabrication industry.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.4
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• pp.35-46
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• 2000

Semiconductor technology includes from semiconductor materials, design, fabrication, handling of process equipments, reliability test to packaged semiconductor devices. Our departmental curriculum is organized with 2-years/6-quarters system of Ulsan College: the understanding for the fundamental of semiconductor is carried out in the first academic year and the training for the design skill on semiconductor devices will be focused in the second academic year. The main focus is reflected on the worldwide trend on the design engineering of semiconductor devices and considered for the market establishment on design engineers trained by the lab-oriented practice as well as the fundamental of semiconductor technology.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.2
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• pp.106-113
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• 2006

Electrical properties of $Si_{0.88}Ge_{0.12}(C)$ p-MOSFETs have been exploited in an effort to investigate $Si_{0.88}Ge_{0.12}(C)$ channel structures designed especially to suppress diffusion of dopants during epitaxial growth and subsequent fabrication processes. The incorporation of 0.1 percent of carbon in $Si_{0.88}Ge_{0.12}$ channel layer could accomodate stress due to lattice mismatch and adjust bandgap energy slightly, but resulted in deteriorated current-voltage properties in a broad range of operation conditions with depressed gain, high subthreshold current level and many weak breakdown electric field in gateoxide. $Si_{0.88}Ge_{0.12}(C)$ channel structures with boron delta-doping represented increased conductance and feasible use of modulation doped device of $Si_{0.88}Ge_{0.12}(C)$ heterostructures.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.3
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• pp.185-196
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• 2002

MRAM(magnetic random access memory) is a promising candidate for a universal memory with non-volatile, fast operation speed and low power consumption. The simplest architecture of MRAM cell is a combination of MTJ(magnetic tunnel junction) as a data storage part and MOS transistor as a data selection part. This article will review the general development status of MRAM and discuss the issues. The key issues of MRAM technology as a future memory candidate are resistance control and low current operation for small enough device size. Switching issues are controllable with a choice of appropriate shape and fine patterning process. The control of fabrication is rather important to realize an actual memory device for MRAM technology.

• Journal of the Korea Society for Simulation
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• v.26 no.4
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• pp.35-41
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• 2017

With the advances in Internet over Things, the demand in diverse electronic devices such as mobile phones and sensors has been rapidly increasing and boosting up the researches on those products. Semiconductor materials, devices, and fabrication processes are becoming more diverse and complicated, which accompanies finding parameters for an optimal fabrication process. In order to find the parameters, a process simulation before fabrication or a real-time process control system during fabrication can be used, but they lack incorporating the feedback from post-fabrication data and compatibility with older equipment. In this research, we have developed an artificial intelligence based simulator, which finds parameters for an optimal process and controls process equipment. In order to apply the control concept to all the equipment in a fabrication sequence, we have developed a prototype for a manipulator which can be installed over an existing buttons and knobs in the equipment and controls the equipment communicating with the AI over the Internet. The AI is based on the deep learning to find process parameters that will produce a device having target electrical characteristics. The proposed simulator can control existing equipment via the Internet to fabricate devices with desired performance and, therefore, it will help engineers to develop new devices efficiently and effectively.

• 한국정보디스플레이학회:학술대회논문집
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• 2008.10a
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• pp.543-544
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• 2008

In the fabrication of inverted top emission organic light emitting diodes (ITOLEDs), the organic layers are damaged by high-energy plasma sputtering process for transparent top anode. In this study, the plasma process induced damages on metal oxide hole injection layers (HILs) including $WO_3$, $MoO_3$, and $V_2O_5$ as buffer layer are examined. With the result of IV characteristic of hole-only devices, we propose that $MoO_3$ and $V_2O_5$ are stable materials against plasma sputtering process.

• Journal of Information Processing Systems
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• v.10 no.3
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• pp.429-442
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• 2014

In this paper, we investigated the use of seasonal autoregressive integrated moving average (SARIMA) time series models for fault detection in semiconductor etch equipment data. The derivative dynamic time warping algorithm was employed for the synchronization of data. The models were generated using a set of data from healthy runs, and the established models were compared with the experimental runs to find the faulty runs. It has been shown that the SARIMA modeling for this data can detect faults in the etch tool data from the semiconductor industry with an accuracy of 80% and 90% using the parameter-wise error computation and the step-wise error computation, respectively. We found that SARIMA is useful to detect incipient faults in semiconductor fabrication.