• Proceedings of the Materials Research Society of Korea Conference
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• 1998.08a
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• pp.124.4-124
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• 1998

• IE interfaces
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• v.21 no.2
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• pp.141-150
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• 2008

In this paper, an efficient control method for semiconductor fabrication process is presented. Generally, control is performed with data which is under the influence of process disturbance. EWMA is one of the most popular control methods in semiconductor fabrication that effectively deals with varying process condition. A new method using EWMA, called the Dual Damping EWMA, is presented in this study to reduce over-control by separating weight factor of input and output. The goal is to reflect Drift but reduce the effects of White noise in run to run control. Simulation is performed to evaluate the performance of DPEWMA and to compare with EWMA and Double EWMA.

• Ceramist
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• v.21 no.1
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• pp.44-54
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• 2018

Oxide semiconductor has been spotlighted as a channel material of TFTs in AMLCD as an alternative to Si, due to high mobility ( > $5cm^2/Vs$). It is also one of the strong candidates for TFTs in AMOLED because of high bias stability at amorphous phase. Beyond the advantages mentioned above, oxide semiconductor has many strengths such as transparency, low fabrication temperature and relatively low fabrication cost. For those reasons, the application of oxide semiconductor is not limited to display but can be extended to new types of electronics, for example, transient electronics for human implantable devices. From this context, oxide materials that have been used as semiconductor and insulator at transient electronics are investigated respectively, and conductor and substrate candidates are also explained, since transient electronics require systematic consideration beyond individual oxide films.

• Electronics and Telecommunications Trends
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• v.38 no.6
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• pp.52-61
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• 2023

With semiconductor scaling approaching the physical limits, devices including CMOS (complementary metal-oxide-semiconductor) components have managed to overcome yet are currently struggling with several technical issues like short-channel effects. Evolving from the process node of 22 nm with FinFET (fin field effect transistor), state-of-the-art semiconductor technology has reached the 3 nm node with the GAA-FET (gate-all-around FET), which appropriately addresses the main issues of power, performance, and cost. Technical problems remain regarding the foundry of GAA-FET, and next-generation devices called post-GAA transistors have not yet been devised, except for the CFET (complementary FET). We introduce a CFET that spatially stacks p- and n-channel FETs on the same footprint and describe its structure and fabrication. Technical details like stacking of nanosheets, special spacers, hetero-epitaxy, and selective recess are more thoroughly reviewed than in similar articles on CFET fabrication.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.29 no.11 s.242
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• pp.1463-1471
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• 2005

This paper proposes an agent-based scheduling method fur semiconductor wafer fabrication facilities with hard inter-operation temporal constraints. The scheduling problem is to find the feasible schedules that guarantee both logical and temporal correctness. A proposed multi-agent based architecture is composed of scheduling agents, workcell agents, and machine agents. A scheduling agent computes optimal schedules through bidding mechanisms with a subset or entire set of the workcell agents. A dynamic planning-based approach is adopted for the scheduling mechanism so that the dynamic behaviors such as aperiodic job arrivals and reconfiguration can be taken into consideration.

• Journal of Korean Institute of Industrial Engineers
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• v.35 no.4
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• pp.266-279
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• 2009

This paper focuses on the problem of scheduling wafer lots with limited waiting times between pairs of consecutive operations in a semiconductor wafer fabrication facility. For the problem of minimizing total tardiness of orders, we develop a priority rule based scheduling method in which a scheduling decision for an operation is made based on the states of workstations for the operation and its successor or predecessor operation. To evaluate performance of the suggested scheduling method, we perform simulation experiments using real factory data as well as randomly generated data sets. Results of the simulation experiments show that the suggested method performs better than a method suggested in other research and the one that has been used in practice.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.6
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• pp.747-753
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• 1986

This paper describes the design and fabrication of a digital volume control integrated circuit which replaces a mechanical volume control. The integrated circuit can be controlled volume by up/down switch. It has been fabricated by SST bipolar standard process. Its chip size is 2.5x2.5 mm\ulcorner As a result, we succeeded in fabrication of integrated circuit which satisfied DC characteristics and proper operation of volume control.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.32 no.2
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• pp.111-115
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• 2022

Objectives: The purpose of this study is to verify whether droplet-induced propagation, the main route of infectious diseases such as COVID-19, can occur in semiconductor FAB (Fabrication), based on research results on general droplet propagation. Methods: Through data surveys droplet propagation was modeled through simulation and experimental case analysis according to general (without mask) and mask-wearing conditions, and the risk of droplet propagation was inferred by reflecting semiconductor FAB operation conditions (air current, air conditioning system, humidity, filter conditions). Results: Based on the results investigated to predict the possibility of spreading infectious diseases in semiconductor FAB, the total amount of droplet propagation (concentration), propagation distance, and virus life in FAB were inferred by reflecting the management parameter of semiconductor FAB. Conclusions: The total amount(concentration) of droplet propagation in the semiconductor fab is most affected by the presence or absence of wearing a mask and the line air dilution rate has some influence. when worn it spreads within 0.35~1m, and since the humidity is constant the virus can survive in the air for up to 3 hours. as a result the semiconductor fab is judged to be and effective space to block virus propagation due to the special environmental condition of a clean room.

• Proceedings of the Korean Magnestics Society Conference
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• 2007.05a
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• pp.179.1-179.1
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• 2007

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.22 no.1
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• pp.52-59
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• 2012

Objectives: The purpose of this study was to evaluate the exposure possibility of by-products during the semiconductor manufacturing processes. Methods: The authors investigated types of chemicals generated during semiconductor manufacturing processes by the qualitative experiment on generation of by-products at the laboratory and a literature survey. Results: By-products due to decomposition of photoresist by UV-light during the photo-lithography process, ionization of arsine during the ion implant process, and inter-reactions of chemicals used at diffusion and deposition processes can be generated in wafer fabrication line. Volatile organic compounds (VOCs) such as benzene and formaldehyde can be generated during the mold process due to decomposition of epoxy molding compound and mold cleaner in semiconductor chip assembly line. Conclusions: Various types of by-products can be generated during the semiconductor manufacturing processes. Therefore, by-products carcinogen such as benzene, formaldehyde, and arsenic as well as chemical substances used during the semiconductor manufacturing processes should be controlled carefully.