• Fire Science and Engineering
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• v.26 no.1
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• pp.61-67
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• 2012

In the three-phase power system using the three-phase motor, when any one-phase is open-phase, the unbalanced current flows and the single-phase power supplied by power supply produces overcurrent to motor coil. As a result, the enormous damage and electrical fire can be given to the power system. Recently, the thermal over-current relay (THR) or electronic motor protection relay (EMPR) is mostly used as the open-phase detection device of the three-phase motor. When the over-current or overheat of electric line is generated, it detects and operates circuit breaker, but there is the defect that the sensing speed is slow, the operation can be sometimes failed, and the precision is decreased. In order to improve these problems, this paper is proposed a new control circuit topology for openphase protection using semiconductor devices. Therefore, the proposed open-phase protection device (OPPD) enhances the sensing speed and precision, and has the advantage of simple fitting in the three-phase motor control panel in the field, as it manufactures into small size and light weight. As a result, the proposed OPPD protects the three-phase motor, minimizes the electrical fire from openphase, and contributes for the stable driving of the power system. The performance and confidence of the proposed OPPD is confirmed by a great variety of the experiments of operation characteristic.

• Bulletin of the Korean Chemical Society
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• v.33 no.9
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• pp.3061-3070
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• 2012

Novel 2-hexylthieno[3,2-b]thiophene-containing conjugated molecules have been synthesized via a reduction reaction using tin chloride in an acidic medium. They exhibited good solubility in common organic solvents and good self-film and crystal-forming properties. The single-crystalline objects were fabricated by a solvent slow diffusion process and then were employed for fabricating field-effect transistors (FETs) along with thinfilm transistors (TFTs). TFTs made of 5 and 6 exhibited carrier mobility as high as 0.10-0.15 $cm^2V^{-1}s^{-1}$. The single-crystal-based FET made of 6 showed 0.70 $cm^2V^{-1}s^{-1}$ which was relatively higher than that of the 5-based FET (${\mu}=0.23cm^2V^{-1}s^{-1}$). In addition, we fabricated organic photovoltaic (OPV) cells with new 2-hexylthieno [3,2-b]thiophene-containing conjugated molecules and methanofullerene [6,6]-phenyl C61-butyric acid methyl ester ($PC_{61}BM$) without thermal annealing. The ternary system for a bulk heterojunction (BHJ) OPV cell was elaborated using $PC_{61}BM$ and two p-type conjugated molecules such as 5 and 7 for modulating the molecular energy levels. As a result, the OPV cell containing 5, 7, and $PC_{61}BM$ had improved results with an open-circuit voltage of 0.90 V, a short-circuit current density of 2.83 $mA/cm^2$, and a fill factor of 0.31, offering an overall power conversion efficiency (PCE) of 0.78%, which was larger than those of the devices made of only molecule 5 (${\eta}$~0.67%) or 7 (${\eta}$~0.46%) with $PC_{61}BM$ under identical weight compositions.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.3
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• pp.1-8
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• 2002

In order to study electric properties of (Pb$\_$0.9/La$\_$0.1/)Ti$\_$0.975/O$_3$(PLT (10)) films with varying excess lead concentration (7.5, 10, 12.5, 15 ㏖% excess lead), the PLT films were deposited by sol-gel process. DTA analyses reveal that the crystallization temperature of the precursor powers decreased with increasing amount of excess lead. XRD patterns of PLT reveal pure perovskite structure and the preferred orientation increased with increasing Pb content in the films. With increasing amount of excess P$\_$b/, the relative permittivity ($\xi$$\_$r/) increased and leakage current density at 100 ㎸/cm transformed 4.01$\times$10$\^$-5/, 2.42$\times$10$\^$-6/, 1.27$\times$10$\^$-6/, 1.56$\times$10$\^$-6/A/㎠ respectively. In the results of hysteresis loops measured at 166 kV/cm, the remanent polarization (P$\_$r/) and the coercive field (E$\_$c) are 6.36$\mu$C/cm and 58.7 ㎸/cm, respectively (at 12.5 ㏖% excess P$\_$b/) With increasing amount of excess Pb, the remanent polarization for PLT thin film degraded to about 44%, 27%, 15%, 16% of the initial value after 10$\^$9/ cycles./TEX>) With increasing amount of excess Pb, the remanent polarization for PLT thin film degraded to about 44%, 27%, 15%, 16% of the initial value after $10^{9}$ cycles.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.4
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• pp.49-60
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• 2010

Semiconductor packages are increasingly moving toward miniaturization, lighter and high performance. Futhermore, packages become thinner. Thin packages will generate serious reliability problems such as warpage, crack and other failures. Reliability problems are mainly caused by the CTE mismatch of various package materials. Therefore, proper selection of the package materials and geometrical optimization is very important for controlling the warpage and the stress of the package. In this study, we investigated the characteristics of the warpage and the stress of several packages currently used in mobile devices such as CABGA, fcSCP, SCSP, and MCP. Warpage and stress distribution are analyzed by the finite element simulation. Key material properties which affect the warpage of package are investigated such as the elastic moduli, CTEs of EMC molding and the substrate. Geometrical effects are also investigated including the thickness or size of EMC molding, silicon die and substrate. The simulation results indicate that the most influential factors on warpage are EMC molding thickness, CTE of EMC, elastic modulus of the substrate. Simulation results show that warpage is the largest for SCSP. In order to reduce the warpage, DOE optimization is performed, and the optimization results show that warpage of SCSP becomes $10{\mu}m$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.601-608
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• 2014

In this paper, we have characterized the electrical properties related to gate leakage current in AlGaN/GaN MISHFETs with varying the thickness (0 to 10 nm) of $Al_2O_3$ gate insulator which also serves as a surface protection layer during high-temperature RTP. The sheet resistance of the unprotected TLM pattern after RTP was rapidly increased to $1323{\Omega}/{\square}$ from the value of $400{\Omega}/{\square}$ of the as-grown sample due to thermal damage during high temperature RTP. On the other hand, the sheet resistances of the TLM pattern protected with thin $Al_2O_3$ layer (when its thickness is larger than 5 nm) were slightly decreased after high-temperature RTP since the deposited $Al_2O_3$ layer effectively neutralizes the acceptor-like states on the surface of AlGaN layer which in turn increases the 2DEG density. AlGaN/GaN MISHFET with 8 nm-thick $Al_2O_3$ gate insulator exhibited extremely low gate leakage current of $10^{-9}A/mm$, which led to superior device performances such as a very low subthreshold swing (SS) of 80 mV/dec and high $I_{on}/I_{off}$ ratio of ${\sim}10^{10}$. The PF emission and FN tunneling models were used to characterize the gate leakage currents of the devices. The device with 5 nm-thick $Al_2O_3$ layer exhibited both PF emission and FN tunneling at relatively lower gate voltages compared to that with 8 nm-thick $Al_2O_3$ layer due to thinner $Al_2O_3$ layer, as expected. The device with 10 nm-thick $Al_2O_3$ layer, however, showed very high gate leakage current of $5.5{\times}10^{-4}A/mm$ due to poly-crystallization of the $Al_2O_3$ layer during the high-temperature RTP, which led to very poor performances.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.113-114
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• 2009

Silicon carbide is one of the most attractive and promising wide band-gap semiconductor material with excellent physical properties and huge potential for electronic applications. Up to now, the most successful method for growth of large SiC crystals with high quality is the physical vapor transport (PVT) method [1, 2]. Since further reduction of defect densities in larger crystal are needed for the true implementation of SiC devices, many researchers are focusing to improve the quality of SiC single crystal through the process modifications for SiC bulk growth or new material implementations [3, 4]. It is well known that for getting high quality SiC crystal, source materials with high purity must be used in PVT method. Among various source materials in PVT method, a SiC powder is considered to take an important role because it would influence on crystal quality of SiC crystal as well as optimum temperature of single crystal growth, the growth rate and doping characteristics. In reality, the effect of powder on SiC crystal could definitely exhibit the complicated correlation. Therefore, the present research was focused to investigate the quality difference of SiC crystal grown by conventional PVT method with using various SiC powders. As shown in Fig. 1, we used three SiC powders with different particles size. The 6H-SiC crystals were grown by conventional PVT process and the SiC seeds and the high purity SiC source materials are placed on opposite side in a sealed graphite crucible which is surrounded by graphite insulation[5, 6]. The bulk SiC crystal was grown at $2300^{\circ}C$ of the growth temperature and 50mbar of an argon pressure. The axial thermal gradient across the SiC crystal during the growth is estimated in the range of $15\sim20^{\circ}C/cm$. The chemical etch in molten KOH maintained at $450^{\circ}C$ for 10 min was used for defect observation with a polarizing microscope in Nomarski mode. Electrical properties of bulk SiC materials were measured by Hall effect using van der Pauw geometry and a UV/VIS spectrophotometer. Fig. 2 shows optical photographs of SiC crystal ingot grown by PVT method and Table 1 shows electrical properties of SiC crystals. The electrical properties as well as crystal quality of SiC crystals were systematically investigated.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.2 s.344
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• pp.8-12
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• 2006

We have fabricated ZnO thin film on $Pt/TiO-2/SiO_2/Si$ substrate by the sol-gel method and have investigated the effect of annealing temperature on the structural morphology and optical properties of ZnO thin films. The ZnO thin film annealed at $600^{\circ}C$ exhibits the highest c-axis orientation and its FWHM of X-ray peak is $0.4360^{\circ}C$. In the results of surface morphology investigation of ZnO thin film by using Am it is observed that ZnO thin film annealed at $600^{\circ}C$ exhibits the largest UV (ultraviolet) exciton emission at around 378nm and the smallest visible emission at around 510nm among these of ZnO thin films annealed at various temperatures. It is deduced that the ZnO thim film annealed at $600^{\circ}C$ is formed most stoichiometrically since the visible emission at around 510nm comes from oxygen vacancy or impurities.

• Journal of the Korean Society for Nondestructive Testing
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• v.22 no.4
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• pp.333-346
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• 2002

The continuous indentation techniques are one of the most effective methods to nondestructively estimate mechanical properties. There are many applications in various dimensions of materials from macro-scale, through micro-scale, even to nano-scale range. The macro-range technology of kgf-load level is now focused on the evaluation of tensile properties and residual stress of bulk materials, for example, used in conventional load-bearing structures and in-use pipelines. The technology and the apparatus were successfully developed by a domestic research group. The micro-range technology of gf-load level can be applied to investigate some property-gradient materials such as weldment. Because it has better spatial resolution than the macro-range technology. The nano-range technology (called nanoindentation technique) of mgf-load level is basically used to evaluate hardness and modulus of micro- and nano-materials. Moreover, many researches are going on to measure tensile properties and residual stress. The nanoindentation technology is easy to be applied to the various fields, such as semiconductor devices, multiphase materials, and biomaterials, though other methods are too difficult to be applied due to dimensional or environmental limitations. On the basis of these accomplishments, the international and the domestic standards are being established.

• Journal of the Korea Convergence Society
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• v.8 no.8
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• pp.9-15
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• 2017

With the development of semiconductor integration technology, central processing units and storage devices have been miniaturized and performance has been rapidly developed, interconnection network technology is becoming a more important factor in terms of the performance of high performance computing system. In this paper, we analyze the trend of interconnection network technology used in high performance computing. Interconnect technology, which is the most widely used in the Supercomputer Top 500(2017. 06.), is an Infiniband. Recently, Ethernet is the second highest share after InfiniBand due to the emergence of 40/100Gbps Gigabit Ethernet technology. Gigabit Ethernet, where latency performance is lower than InfiniBand, is preferred in cost-effective medium-sized data centers. In addition, top-end HPC systems that demand high performance are devoting themselves from Ethernet and InfiniBand technologies and are attempting to maximize system performance by introducing their own interconnect networks. In the future, high-performance interconnects are expected to utilize silicon-based optical communication technology to exchange data with light.

• The Journal of the Korea Contents Association
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• v.10 no.6
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• pp.329-335
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• 2010

Digital imaging detectors can use a variety of detection materials to convert X-ray radiation either to light or directly to electron charge. Many detectors such as amorphous silicon flat panels, CCDs, and CMOS photodiode arrays incorporate a scintillator screen to convert x-ray to light. The digital radiography systems based on semiconductor detectors, commonly referred to as flat panel detectors, are gaining popularity in the clinical & hospital. The X-ray detectors are described between a-Silicon based indirect type and a-Selenium based direct type. The DRS of detectors is used to convert the x-ray to electron hole pairs. Image processing is described by specific image features: Latitude compression, Contrast enhancement, Edge enhancement, Look up table, Noise suppression. The image features are tuned independently. The final enhancement result is a combination of all image features. The parameters are altered by using specific image features in the different several hospitals. The image in a radiological report consists of two image evaluation processes: Clinical image parameters and MTF is a descriptor of the spatial resolution of a digital imaging system. We used the edge test phantom and exposure procedure described in the IEC 61267 to obtain an edge spread function from which the MTF is calculated. We can compare image in the processing parameters to change between original and processed image data. The angle of the edge with respect to the axes of detector was varied in order to determine the MTF as a function of direction. Each MTF is integrated within the spatial resolution interval of 1.35-11.70 cycles/mm at the 50% MTF point. Each image enhancement parameters consists of edge, frequency, contrast, LUT, noise, sensitometry curve, threshold level, windows. The digital device is also shown to have good uniformity of MTF and image parameters across its modality. The measurements reported here represent a comprehensive evaluation of digital radiography system designed for use in the DRS. The results indicate that the parameter enables very good image quality in the digital radiography. Of course, the quality of image from a parameter is determined by other digital devices in addition to the proper clinical image.