• Journal of Mechanical Science and Technology
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• v.19 no.3
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• pp.820-825
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• 2005

This paper proposes non-destructive ESPI technique to evaluate inside defects of semiconductor package quantitatively. Inspection system consists of ESPI system, thermal loading system and adiabatic chamber. The technique has high feasibility in non-destructive testing of semiconductor and gives solutions to the drawbacks in previous technique, time-consuming and the difficulty of quantitative evaluation. In result, most of defects are classified in delamination, from which it is inferred to the insufficiency of adhesive strength between layers and nonhomogeneous heat spread. The $90\%$ of tested samples have a delamination defect started at the around of the chip which may be related to heat spread design.

• JSTS:Journal of Semiconductor Technology and Science
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• v.6 no.1
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• pp.43-51
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• 2006

80-nm self-aligned n-and p-channel I-MOS devices were demonstrated by using a novel fabrication method featuring double sidewall spacer, elevated drain structure and RTA process. The fabricated devices showed a normal transistor operation with extremely small subthreshold swing less than 12.2 mV/dec at room temperature. The n- and p-channel I-MOS devices had an ON/OFF current of 394.1/0.3 ${\mu}A$ and 355.4/8.9 ${\mu}A$ per ${\mu}m$, respectively. We also investigated some critical issues in device design such as the junction depth of the source extension region and the substrate doping concentration.

• Journal of KSNVE
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• v.9 no.6
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• pp.1227-1233
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• 1999

Modern technology depends on the reliability of extremely high technology equipments. In the production of semiconductor wafer, optical and electron microscopes, ion-beam, laser device must maintain their alignments within a nanometer. This equipment requires a vibration free environment to provide its proper function. Especially, lithography and inspection devices, which have sub-nanometer class high accuracy and resolution, have come to necessity for producing more improved giga and tera class semiconductor wafers. This high technology equipments require very strict environmental vibration standard, vibration criteria, in proportion to the accuracy of the manufacturing, inspecting devices. This paper deals with the structural dynamic design in high class semiconductor factory in order to be satisfied more strict vibration criteria for high sensitive equipment.

• Proceedings of the KIEE Conference
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• 1988.07a
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• pp.213-216
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• 1988

This paper describes design & fabrication of RF modulator using 2um Bipolar process which convert video & audio signal into high frequency VHF/UHF signals for all TV standards. This VHF/UHF RF modulator fabricated using 2um bipolar process( T max = 5GHz) shows satisfying electrical characteristics and meets all the design targets.

• Journal of Power Electronics
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• v.10 no.6
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• pp.643-646
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• 2010

An interactive web-based teaching tool for a power semiconductor course at the University of Central Florida is presented in this paper. A novel approach is introduced using Technology Aided Design Tools (TCAD) to generate time-lapsed 2D semiconductor device cross-section embedded in a webpage using $Adobe^{(R)}$ Flash (web design tool) platform to create interactive movies that demonstrate complex device physical phenomenon. Students can step through the interactive movies forward, backward, pausing, or looping. Each step represents a giving bias condition. Current-voltage plots are represented along with the semiconductor device and a visual point is placed on the IV curve to indicate the current bias conditions. The changes are then reflected in the 2D cross-section movie area and the IV plot. This tool was implemented in a classroom setting to augment the lectures or for discovery learning.

• Journal of the Semiconductor & Display Technology
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• v.8 no.3
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• pp.7-11
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• 2009

In this paper, we developed and presented a design result for optimizing the geometry of Ag circular SPP waveguide for subwavelength waveguide applications. We investigated the effect of the design parameters on the light propagation and find the optimum design for small modal size, high coupling coefficient, and low sensitivity. The results show that the globally optimal design locates optimal waveguide geometries more efficiently than individual optimal points for multivalued objective function.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.3
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• pp.240-249
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• 2004

In the present paper efforts have been made to optimize InAlAs/InGaAs HEMT by enhancing the effective gate voltage ($(V_c-V_off)$) using pulsed doped structure from uniformly doped to delta doped for microwave frequency applications and reliability. The detailed design criteria to select the proper design parameters have also been discussed in detail to exclude parallel conduction without affecting the del ice performance. Then the optimized value of $V_c-V_off$and breakdown voltages corresponding to maximum value of transconductance has been obtained. These values are then used to predict the transconductance and cut-off frequency of the del ice for different channel depths and gate lengths.

• Proceedings of the IEEK Conference
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• 2003.11c
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• pp.335-339
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• 2003

This Paper describes the design and the simulation results of the RF CMOS Class-E Power Amplifier for a 2.4GHz ISM band. This circuit is composed two connected amplifiers. where Class F amplifier drives Class E amplifier. The proposed circuit can reduce the total power dissipation of the driving stage and can work with higher efficiency. The power amplifier has been implemented in a standard 0.25$\mu\textrm{m}$ CMOS technology and is shown to deliver 100mW output Power to load with 41％ power added efficiency(PAE) from a 2.5V supply.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.43-48
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• 2023

This paper discusses the design of 32Mbyte asynchronous nonvolatile memory modules, which includes self-diagnosis and RTC (Real Time Clock) functions to enhance their data stability and reliability. Nonvolatile memory modules can maintain data even in a power-off state, thereby improving the stability and reliability of a system or device. However, due to the possibility of data error due to electrical or physical reasons, additional data loss prevention methods are required. To minimize data error in asynchronous nonvolatile memory modules, this paper proposes the use of voltage monitoring circuits, self-diagnosis, BBT (Bad Block Table), ECC (Error Correction Code), CRC (Cyclic Redundancy Check)32, and data check sum, data recording method using RTC. Prototypes have been produced to confirm correct operation and suggest the possibility of commercialization.

• Journal of the Semiconductor & Display Technology
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• v.1 no.1
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• pp.41-45
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• 2002

In modem manufacturing, new applations and technologies demand smaller, and functional devices to replace large systems. As miniaturization becomes a necessity, many companies are interested in small pumps for use in creating ultra-high vacuum, but past efforts to develop such systems have failed due to problems with vibration, stress, heat and power consumption. This paper shows analysis-based design techniques for high vacuum turbomolecular pump by finite element analysis.