• 제목/요약/키워드: Selective Harmonic Elimination

검색결과 33건 처리시간 0.026초

Application of Bacterial Foraging Algorithm and Genetic Algorithm for Selective Voltage Harmonic Elimination in PWM Inverter

  • Maheswaran, D.;Rajasekar, N.;Priya, K.;Ashok kumar, L.
    • Journal of Electrical Engineering and Technology
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    • 제10권3호
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    • pp.944-951
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    • 2015
  • Pulse Width Modulation (PWM) techniques are increasingly employed for PWM inverter fed induction motor drive. Among various popular PWM methods used, Selective Harmonic Elimination PWM (SHEPWM) has been widely accepted for its better harmonic elimination capability. In addition, using SHEPWM, it is also possible to maintain better voltage regulation. Hence, in this paper, an attempt has been made to apply Bacterial Foraging Algorithm (BFA) for solving selective harmonic elimination problem. The problem of voltage harmonic elimination together with output voltage regulation is drafted as an optimization task and the solution is sought through proposed method. For performance comparison of BFA, the results obtained are compared with other techniques such as derivative based Newton-Raphson method, and Genetic Algorithm. From the comparison, it can be observed that BFA based approach yields better results. Further, it provides superior convergence, reduced computational burden, and guaranteed global optima. The simulation results are validated through experimental findings.

Generalized Selective Harmonic Elimination Modulation for Transistor-Clamped H-Bridge Multilevel Inverter

  • Halim, Wahidah Abd.;Rahim, Nasrudin Abd.;Azri, Maaspaliza
    • Journal of Power Electronics
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    • 제15권4호
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    • pp.964-973
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    • 2015
  • This paper presents a simple approach for the selective harmonic elimination (SHE) of multilevel inverter based on the transistor-clamped H-bridge (TCHB) family. The SHE modulation is derived from the sinusoidal voltage-angle equal criteria corresponding to the optimized switching angles. The switching angles are computed offline by solving transcendental non-linear equations characterizing the harmonic contents using the Newton-Raphson method to produce an optimum stepped output. Simulation and experimental tests are conducted for verification of the analytical solutions. An Altera DE2 field-programmable gate array (FPGA) board is used as the digital controller device in order to verify the proposed SHE modulation in real-time applications. An analysis of the voltage total harmonic distortion (THD) has been obtained for multiple output voltage cases. In terms of the THD, the results showed that the higher the number of output levels, the lower the THD due to an increase number of harmonic orders being eliminated.

Harmonic Elimination in Three-Phase Voltage Source Inverters by Particle Swarm Optimization

  • Azab, Mohamed
    • Journal of Electrical Engineering and Technology
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    • 제6권3호
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    • pp.334-341
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    • 2011
  • This paper presents accurate solutions for nonlinear transcendental equations of the selective harmonic elimination technique used in three-phase PWM inverters feeding the induction motor by particle swarm optimization (PSO). With the proposed approach, the required switching angles are computed efficiently to eliminate low order harmonics up to the $23^{rd}$ from the inverter voltage waveform, whereas the magnitude of the fundamental component is controlled to the desired value. A set of solutions and the evaluation of the proposed method are presented. The obtained results prove that the algorithm converges to a precise solution after several iterations. The salient contribution of the paper is the application of the particle swarm algorithm to attenuate successfully any undesired loworder harmonics from the inverter output voltage. The current paper demonstrates that the PSO is a promising approach to control the operation of a three-phase voltage source inverter with a selective harmonic elimination strategy to be applied in induction motor drives.

Reconfigurable Selective Harmonic Elimination Technique for Wide Range Operations in Asymmetric Cascaded Multilevel Inverter

  • Kavitha, R;Rani, Thottungal
    • Journal of Power Electronics
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    • 제18권4호
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    • pp.1037-1050
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    • 2018
  • This paper presents a novel reconfigurable selective harmonic elimination technique to control harmonics over a wide range of Modulation Indexes (MI) in Multi-Level Inverter (MLI). In the proposed method, the region of the MI is divided into various sectors and expressions are formulated with different switching patterns for each of the sectors. A memetic BBO-MAS (Biogeography Based Optimization - Mesh Adaptive direct Search) optimization algorithm is proposed for solving the Selective Harmonic Elimination - Pulse Width Modulation (SHE-PWM) technique. An experimental prototype is developed using a Field Programmable Gate Array (FPGA) and their FFT spectrums are analyzed over a wide range of MI using a fluke power logger. Simulation and experimental results have validated the performance of the proposed optimization algorithms and the reconfigurable SHE-PWM technique. Further, the sensitivity of the harmonics has been analyzed considering non-integer variations in the magnitude of the input DC sources.

A Practical Algorithm for Selective Harmonic Elimination in Five-Level Converters

  • Golshan, Farzad;Abrishamifar, Adib;Arasteh, Mohammad
    • Journal of Power Electronics
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    • 제18권6호
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    • pp.1650-1658
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    • 2018
  • Multilevel converters are being widely used in medium-voltage high-power applications including motor drive systems, utility power transmission, and distribution systems. Selective harmonic elimination (SHE) is a well-known modulation method to generate high quality output voltage waveforms. This paper presents a new simple practical method for generating a generalized five-level waveform without selected low order harmonics. This method is based on a phase-shifted expression for the SHE problem, which can analytically calculate the exact values of switching angles and the feasible modulation index range for three-level and five-level waveforms. The proposed method automatically determines the number of transitions between levels and generates proper output waveform without solving complex trigonometric equations. Due to the simplicity of the computational burden, the real-time implementation of the proposed algorithm can be performed by a simple processor. Simulation and experiment results verify the correctness and effectiveness of the proposed method.

A Novel Analytical Method for Selective Harmonic Elimination Problem in Five-Level Converters

  • Golshan, Farzad;Abrishamifar, Adib;Arasteh, Mohammad
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.914-922
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    • 2017
  • Multilevel converters have attracted a lot of attention in recent years. The efficiency parameters of a multilevel converter such as the switching losses and total harmonic distortion (THD) mainly depend on the modulation strategy used to control the converter. Among all of the modulation techniques, the selective harmonic elimination (SHE) method is particularly suitable for high-power applications due to its low switching frequency and high quality output voltage. This paper proposes a new expression for the SHE problem in five-level converters. Based on this new expression, a simple analytical method is introduced to determine the feasible modulation index intervals and to calculate the exact value of the switching angles. For each selected harmonic, this method presents three-level or five-level waveforms according to the value of the modulation index. Furthermore, a flowchart is proposed for the real-time implementation of this analytical method, which can be performed by a simple processor and without the need of any lookup table. The performance of the proposed algorithm is evaluated with several simulation and experimental results for a single phase five-level diode-clamped inverter.

Increasing the Range of Modulation Indices with the Polarities of Cells and Switching Constraint Reliefs for the Selective Harmonic Elimination Pulse Width Modulation Technique

  • Najjar, Mohammad;Iman-Eini, Hossein;Moeini, Amirhossein
    • Journal of Power Electronics
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    • 제17권4호
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    • pp.933-941
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    • 2017
  • In this paper an improved low frequency selective harmonic elimination-PWM (SHE-PWM) technique for Cascaded H-bridge (CHB) converters is proposed. The proposed method is able to eliminate low order harmonics from the output voltage of the converter for a wide range of modulation indices. To solve SHE-PWM equations, especially for low modulation indices, a modified method is used which employs either the positive or negative voltage polarities of H-bridge cells to increase the freedom degrees of each cell. Freedom degrees of the switching angles are also used to increase the range of available solutions for non-linear SHE equations. The proposed SHE methods can successfully eliminate up to $25^{th}$ harmonic from a 7-level output voltage by using just nine switching transitions or a 150 Hz switching frequency. To confirm the validity of the proposed method, simulation and experimental results have been presented.

단상 Cascaded H-Bridge 인버터의 출력 전압 품질 향상을 위한 선택적 고조파 제거 변조 기법 개발 (Development of Selective Harmonic Elimination PWM technique for voltage quality improvement of a single phase Cascaded H-Bridge inverter)

  • 이복원;이재석
    • 전기전자학회논문지
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    • 제28권3호
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    • pp.432-439
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    • 2024
  • 본 논문은 재생배터리 에너지저장장치의 신뢰성과 전력품질 향상시키기 위해 개선된 단상 캐스케이드 H-브리지 기반 다중레벨 인버터의 선택적 고조파 제거 기법을 제안한다. 푸리에 급수에서 유도된 비선형 초월 방정식을 오프라인으로 풀어 선택적 고조파 제거 펄스 폭 변조 기법의 구현을 위한 최적의 스위칭 각도를 결정하며, 동작 중에 이 각도는 룩업 테이블을 통해 적용된다. 반복법인 Levenberg-Marquardt 알고리즘을 MATLAB에서 사용하여 방정식을 풀고 스위칭 각도를 얻었다. PLECS 시뮬레이션 소프트웨어를 통해 다중레벨 인버터에 사용되는 다른 기존의 펄스 폭 변조 기법들과 비교를 진행했으며, 제안된 방법의 유효성을 검증했다.

SHE-PWM을 적용한 STATCOM에 의한 저차고조파 제거 방법 (Elemination of Low Order Harmonics from STATCOM using SHE-PWM)

  • 최순호;김찬기;이성두
    • 전력전자학회논문지
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    • 제19권5호
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    • pp.450-456
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    • 2014
  • In HVDC converters that employ a line-commutated control, reactive power is absorbed by the rectifier and inverter terminals during AC/DC conversion. An AC filter usually consists of filters and large shunt capacitors to supply reactive power to the HVDC station. When STATCOM is used to supply reactive power to the HVDC system with AC filter, the low-order harmonics generated from STATCOM can result in a resonance between the shunt capacitor and AC network. Therefore, a control strategy based on selective harmonic elimination is adopted to minimize the low-order harmonics from STATCOM. The cancellation of harmonic instabilities is verified through simulations in PSCAD/EMTDC.

A Power Regulation and Harmonic Current Elimination Approach for Parallel Multi-Inverter Supplying IPT Systems

  • Mai, Ruikun;Li, Yong;Lu, Liwen;He, Zhengyou
    • Journal of Power Electronics
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    • 제16권4호
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    • pp.1245-1255
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    • 2016
  • The single resonant inverter is widely employed in typical inductive power transfer (IPT) systems to generate a high-frequency current in the primary side. However, the power capacity of a single resonant inverter is limited by the constraints of power electronic devices and the relevant cost. Consequently, IPT systems fail to meet high-power application requirements, such as those in rail applications. Total harmonic distortion (THD) may also violate the standard electromagnetic interference requirements with phase shift control under light load conditions. A power regulation approach with selective harmonic elimination is proposed on the basis of a parallel multi-inverter to upgrade the power levels of IPT systems and suppress THD under light load conditions by changing the output voltage pulse width and phase shift angle among parallel multi-inverters. The validity of the proposed control approach is verified by using a 1,412.3 W prototype system, which achieves a maximum transfer efficiency of 90.602%. Output power levels can be dramatically improved with the same semiconductor capacity, and distortion can be effectively suppressed under various load conditions.