• Title/Summary/Keyword: Security design

Search Result 3,411, Processing Time 0.032 seconds

Design and Implementation of Electronic Approval System using Encryption (암호화를 이용한 전자결재 시스템의 설계 및 구현)

  • Jang, Young-Chul;Oh, Teh-Sok;Oh, Moo-Song
    • The Transactions of the Korea Information Processing Society
    • /
    • v.4 no.8
    • /
    • pp.2060-2069
    • /
    • 1997
  • Information processing using computer in generalized in the office automation. In spite of to be integrate and concise form of document through computer network, signature of document with hand have processed as ever. The security on document flow out severely unjust by reason of increment inverse function of computer. Because of revelation secret of enterprise result from unjust outflow, lots of loss of self-enterprise is occured. In this paper, we used efficiently document using the method, electronic approval system with encryption, for the resolving above problems. Also we persue maintenance of security for the important document and process document signature rapidly. Finally, we design and implementation of electronic approval system that take one's share of function between server and client using to be transformed Vernam's encryption technique in stored document.

  • PDF

Hardware Design with Efficient Pipelining for High-throughput AES (높은 처리량을 가지는 AES를 위한 효율적인 파이프라인을 적용한 하드웨어 설계)

  • Antwi, Alexander O.A;Ryoo, Kwangki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2017.10a
    • /
    • pp.578-580
    • /
    • 2017
  • IoT technology poses a lot of security threats. Various algorithms are thus employed in ensuring security of transactions between IoT devices. Advanced Encryption Standard (AES) has gained huge popularity among many other symmetric key algorithms due to its robustness till date. This paper presents a hardware based implementation of the AES algorithm. We present a four-stage pipelined architecture of the encryption and key generation. This method allowed a total plain text size of 512 bits to be encrypted in 46 cycles. The proposed hardware design achieved a maximum frequency of 1.18GHz yielding a throughput of 13Gbps and 800MHz yielding a throughput of 8.9Gbps on the 65nm and 180nm processes respectively.

  • PDF

A Design for Unified Web Authentication at Network Service Foundation (네트워크 서비스 기반의 단일 웹 인증설계)

  • Ban, Kyung-Sig;Lee, Jae-Wan;Kim, Hyoung-Jin
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.12 no.12
    • /
    • pp.2171-2178
    • /
    • 2008
  • Recently, Network companies have introduced security solutions to protect the network from intrusions, attacks and viruses but the network has still weakness and vulnerability. It is time to bring more stable and reliable authentication system that would meet the Internet user's need. In this study, Current broadband networks don't have hierarchic and stable authentication solutions. And so, an integrated and hierarchic system is needed to provide a various kinds of application services. I'd like to present a new authentication system which is based on unified web authentication design. It will unit various authentication systems that have been deployed in various network environment and reinforce network security to provice a various kinds of application services in a stable and safe environment. that is a simple and more secure method for fighting a rise in card-not-present fraud.

Conceptual Data Modeling: Entity-Relationship Models as Thinging Machines

  • Al-Fedaghi, Sabah
    • International Journal of Computer Science & Network Security
    • /
    • v.21 no.9
    • /
    • pp.247-260
    • /
    • 2021
  • Data modeling is a process of developing a model to design and develop a data system that supports an organization's various business processes. A conceptual data model represents a technology-independent specification of structure of data to be stored within a database. The model aims to provide richer expressiveness and incorporate a set of semantics to (a) support the design, control, and integrity parts of the data stored in data management structures and (b) coordinate the viewing of connections and ideas on a database. The described structure of the data is often represented in an entity–relationship (ER) model, which was one of the first data-modeling techniques and is likely to continue to be a popular way of characterizing entity classes, attributes, and relationships. This paper attempts to examine the basic ER modeling notions in order to analyze the concepts to which they refer as well as ways to represent them. In such a mission, we apply a new modeling methodology (thinging machine; TM) to ER in terms of its fundamental building constructs, representation entities, relationships, and attributes. The goal of this venture is to further the understanding of data models and enrich their semantics. Three specific contributions to modeling in this context are incorporated: (a) using the TM model's five generic actions to inject processing in the ER structure; (b) relating the single ontological element of TM modeling (i.e., a thing/machine or thimac) to ER entities and relationships; and (c) proposing a high-level integrated, extended ER model that includes structural and time-oriented notions (e.g., events or behavior).

Prospects of Dual Form of Teaching and Learning in the Realities of the Covid-19 Pandemic and the Post-pandemicPeriod

  • Bratitsel, Maryna;Kravchuk, Olena;Tishko, Liliya;Osiievskyi, Valerii;Bellie, Victoriia
    • International Journal of Computer Science & Network Security
    • /
    • v.21 no.12spc
    • /
    • pp.483-490
    • /
    • 2021
  • The COVID-19 pandemic has posed significant community challenges towards higher education around the world. The urgent and unexpected request for full-time university courses to switch over to online teaching was a particular challenge. Online learning and learning imply a certain pedagogical knowledge content (PKC), mainly related to the design and organization for better learning and the creation of unique learning environments using digital technologies. With the help of the present academic paper, we provide some expert opinion on the PKC connected with online learning with the aim of helping non-university professionals (that is, those with lack of online learning experience) navigate these challenging times. Our findings point to the planning of learning activities with certain features, a combination of three types of presence (social, cognitive and facilitative) and the need to adapt the assessment system to new learning requirements. We will conclude by contemplating on how responding to a crisis can improve teaching and learning practices in the post-digital era.

An efficient ID-based authentication scheme based on the rth -residuosity problem in wireless environment (무선통신 환경에서 사용 가능한 고차잉여류 문제에 기반을 둔 자체 인증방식)

  • 이보영
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.9 no.2
    • /
    • pp.73-82
    • /
    • 1999
  • In an open network computing environment a host cannot to identity its users correctly to network services. In order to prevent this thing we present the design of a authentication scheme 솟 using the notion of rth -residuosity problem and discrete logarithm problem which is proposed by S. J. Park et al. The proposed scheme described here is efficient method for mutual authentication without leakage of users identity in mobile communication system that ensure user anonymity and untraceability.

Design of an Efficient Digit-Serial Multiplier for Elliptic Curve Cryptosystems (타원곡선 암호 시스템에 효과적인 digit-serial 승산기 설계)

  • 이광엽;위사흔;김원종;장준영;정교일;배영환
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.11 no.2
    • /
    • pp.37-44
    • /
    • 2001
  • In this paper, an efficient architecture for the ECC multiplier in GF(2") is proposed. We give a design example for the irreducible trinomials $x_{193}\;+\;x_{15}\;+\;1$. In hardware implementations, it is often desirable to use the irreducible trinomial equations. A digit-serial multiplier with a digit size of 32 is proposed, which has more advantages than the 193bit serial LFSR architecture. The proposed multiplier is verified with a VHDL description using an elliptic curve addition. The elliptic curve used in this implementation is defined by Weierstrass equations. The measured results show that the proposed multiplier it 0.3 times smaller than the bit-serial LFSR multiplier.lier.

On sample size selection for disernment of plain and cipher text using the design of experiments (실험계획법을 이용한 평문.암호문 식별방법의 표본크기 선택에 관한 연구)

  • 차경준
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.9 no.4
    • /
    • pp.71-84
    • /
    • 1999
  • The randomness test for a sequence from an encription algorithm has an important role to make differences between plain and cipher text. Thus it is necessary to investigate and analyze the currently used randomness tests. Also in real time point of views it would be helpful to know a minimum sample size which gives discernment of plain and cipher text. In this paper we analyze the rate of successes for widely used nonparametric randomness tests to discern plain and cipher text through experiments. Moreover for given sample sizes an optimal sample size for each randomness test is proposed using the design of experiments.

A Hardware Implementation for Real-Time Fingerprint Identification (실시간 지문식별을 위한 하드웨어 구현)

  • Kim Kichul;Kim Min;Chung Yongwha;Pan Sung Bum
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.14 no.6
    • /
    • pp.79-89
    • /
    • 2004
  • Fingerprint identification consists of user enrollment phase storing user's fingerprint in a database and user identification phase making a candidate list for a given fingerprint. straightforward approach to perform the user identification phase is to scan the entire database sequentially, and takes times for large-scale databases. In this paper, we develop a hardware design which can perform the user identification phase in real-time. Our design employs parallel processing techniques and has been implemented on a PCI-based platform containing an FPGA and SDRAMs. Based on the performance evaluation, our hardware implementation can provide a scalability and perform the fingerprint identification in real-time.

Design of Modular Exponentiation Processor for RSA Cryptography (RSA 암호시스템을 위한 모듈러 지수 연산 프로세서 설계)

  • 허영준;박혜경;이건직;이원호;유기영
    • Journal of the Korea Institute of Information Security & Cryptology
    • /
    • v.10 no.4
    • /
    • pp.3-11
    • /
    • 2000
  • In this paper, we design modular multiplication systolic array and exponentiation processor having n bits message black. This processor uses Montgomery algorithm and LR binary square and multiply algorithm. This processor consists of 3 divisions, which are control unit that controls computation sequence, 5 shift registers that save input and output values, and modular exponentiation unit. To verify the designed exponetion processor, we model and simulate it using VHDL and MAX+PLUS II. Consider a message block length of n=512, the time needed for encrypting or decrypting such a block is 59.5ms. This modular exponentiation unit is used to RSA cryptosystem.