• Title/Summary/Keyword: Schottky barrier diode(SBD)

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4H-SiC(0001) Epilayer Growth and Electrical Property of Schottky Diode (4H-SiC(0001) Epilayer 성장 및 쇼트키 다이오드의 전기적 특성)

  • Park, Chi-Kwon;Lee, Won-Jae;Nishino Shigehiro;Shin, Byoung-Chul
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.4
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    • pp.344-349
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    • 2006
  • A sublimation epitaxial method, referred to as the Closed Space Technique (CST) was adopted to produce thick SiC epitaxial layers for power device applications. We aimed to systematically investigate the dependence of SiC epilayer quality and growth rate during the sublimation growth using the CST method on various process parameters such as the growth temperature and working pressure. The etched surface of a SiC epitaxial layer grown with low growth rate $(30{\mu}m/h)$ exhibited low etch pit density (EPD) of ${\sim}2000/cm^2$ and a low micropipe density (MPD) of $2/cm^2$. The etched surface of a SiC epitaxial layer grown with high growth rate (above $100{\mu}m/h$) contained a high EPD of ${\sim}3500/cm^2$ and a high MPD of ${\sim}500/cm^2$, which indicates that high growth rate aids the formation of dislocations and micropipes in the epitaxial layer. We also investigated the Schottky barrier diode (SBD) characteristics including a carrier density and depletion layer for Ni/SiC structure and finally proposed a MESFET device fabricated by using selective epilayer process.

Construction of a Ternary Full-Adder (삼치전가산기의 구성)

  • 임인칠;조원경
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.1
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    • pp.15-22
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    • 1974
  • A new ternary full adder using the current controlled negative-resistance circuit is described. The full adder is constructed from the modified-half-adder which was devised by making use of a negative resistance circuit. This full adder makes the number of its gates decrease and makes its own speed increase in comparison with the full adders which had been introduced previously. It is convenient to construct to the integrated circuit because transistor, SBD(Schottky Barrier Diode) and resistors were used as the circuit elements.

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Low temperature growth of Ga2O3 thin films on Si substrates by MOCVD and their electrical characteristics (MOCVD에 의한 Si 기판 위의 Ga2O3 박막 저온 결정 성장과 전기적 특성)

  • Lee, Jung Bok;Ahn, Nam Jun;Ahn, Hyung Soo;Kim, Kyung Hwa;Yang, Min
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.32 no.2
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    • pp.45-50
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    • 2022
  • Ga2O3 thin films were grown on n-type Si substrates at various growth temperatures of 500, 550, 600, 650 and 700℃. The Ga2O3 thin films grown at 500℃ and 550℃ were characterized as featureless flat surface. Grown at higher temperatures (600, 650, and 700℃) showed very rough surface morphology. To figure out the annealing effect on the thin films grown at relatively low temperatures (500, 550, 600, 650 and 700℃), the Ga2O3 films were thermally treated at 900℃ for 10 minutes. Crystal structure of the Ga2O3 films grown at 500 and 550℃ were changed from amorphous to polycrystalline structure with flat surface. Ga2O3 film grown at 550℃ was chosen for the fabrication of a Schottky barrier diode (SBD). Electrical properties of the SBDs depend on the thermal treatment were evaluated. A MSM type photodetector was made on the low temperature grown Ga2O3 thin film. The photocurrent for the illumination of 266 nm wavelength showed 5.32 times higher than dark current at the operating voltage of 10 V.

The effect of deep level defects in SiC on the electrical characteristics of Schottky barrier diode structures (깊은 준위 결함에 의한 SiC SBD 전기적 특성에 대한 영향 분석)

  • Lee, Geon-Hee;Byun, Dong-Wook;Shin, Myeong-Cheol;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.26 no.1
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    • pp.50-55
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    • 2022
  • SiC is a power semiconductor with a wide bandgap, high insulation failure strength, and thermal conductivity, but many deep-level defects. Defects that appear in SiC can be divided into two categories, defects that appear in physical properties and interface traps that appear at interfaces. In this paper, Z1/2 trap concentration 0 ~ 9×1014 cm-3 reported at room temperature (300 K) is applied to SiC substrates and epi layer to investigate turn-on characteristics. As the trap concentration increased, the current density, Shockley-read-Hall (SRH), and Auger recombination decreased, and Ron increased by about 550% from 0.004 to 0.022 mohm.