• Title/Summary/Keyword: Schematic-Design

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A Study on UCT Automatic Steering Control using TDOF PID Controller (2자유도 PID 제어기를 이용한 UCT의 조향제어에 관한 연구)

  • Son, Ju-Han;Lee, Young-Jin;Lee, Jin-Woo;Cho, Hyun-Cheol;Lee, Man-Hyeung;Lee, Kwon-Soon
    • Proceedings of the KIEE Conference
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    • 1999.07b
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    • pp.972-975
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    • 1999
  • Until now, all of the port goods are transported by container transporter driven manually but recently there are a lot of researches about unmanned vehicle driven automatically. In this paper, we present a design of the TDOF PID controller using a hybrid schematic algorithm to control steering system. We used the ES and SA algorithms to construct hybrid tuning algorithm. Then the computer simulation shows that our proposed controller has better Performances than the other one.

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17$\times$17-b Multiplier for 32-bit RISC/DSP Processors (32 비트 RISC/DSP 프로세서를 위한 17 비트 $\times$ 17 비트 곱셈기의 설계)

  • 박종환;문상국;홍종욱;문병인;이용석
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.914-917
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    • 1999
  • The paper describes a 17 $\times$ 17-b multiplier using the Radix-4 Booth’s algorithm. which is suitable for 32-bit RISC/DSP microprocessors. To minimize design area and achieve improved speed, a 2-stage pipeline structure is adopted to achieve high clock frequency. Each part of circuit is modeled and optimized at the transistor level, verification of functionality and timing is performed using HSPICE simulations. After modeling and validating the circuit at transistor level, we lay it out in a 0.35 ${\mu}{\textrm}{m}$ 1-poly 4-metal CMOS technology and perform LVS test to compare the layout with the schematic. The simulation results show that maximum frequency is 330MHz under worst operating conditions at 55$^{\circ}C$ , 3V, The post simulation after layout results shows 187MHz under worst case conditions. It contains 9, 115 transistors and the area of layout is 0.72mm by 0.97mm.

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An Experimental Study on the Performance of a Mixed Mode Type Small Scale MR Damper (복합모드형 소형 MR감쇠장치 성능에 관한 실험적 연구)

  • Lee, Sang-Hyun;Min, Kyung-Won;Lee, Myoung-Kyu;Park, Eun-Churn
    • Proceedings of the Earthquake Engineering Society of Korea Conference
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    • 2005.03a
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    • pp.461-468
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    • 2005
  • In this paper, mixed mode magneto-rheological (MR) damper, which is applicable for vibration control of a small scale multi-story structure, is devised. First, the schematic configurations of the shear, flow, and mixed mode MR dampers are described with design constraints and then the analytical models to predict the field-dependent damping forces are derived for each type. Second, an appropriate size of the mixed mode MR damper is manufactured and its field-dependent damping characteristics are evaluated in time domain. Finally, the performance of the manufactured MR damper which is semi-actively applied to a small scale building excited by earthquake load, is numerically evaluated.

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The implementation of an 8*8 2-D DCT using ROM-based multipliers (ROM 방식의 곱셈기를 이용한 8*8 2차원 DCT의 구현)

  • 이철동;정순기
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.11
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    • pp.152-161
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    • 1996
  • This paper descrisbes the implementation of a 20D DCT that can be used for video conference, JPEG, and MPEG-related applications. The implemented DCT consists of two 1-D DCTs and a transposed memory between them, and uses ROM-based multipliers instead of conventional ones. As the system bit length, the minimum bit length that satisfies the accuracy specified by the ITU standard H.261 was chosen through the simulations using the C language. The proposed design uses a dual port RAM for the transposed memory, and processes two bits of input-pixel data simultaneously t ospeed up addition process using two sets of ROMs. The basic system architecture was designed using th Synopsys schematic editor, and internal modules were described in VHDL and synthesized to logic level after simulation. Then, the compass silicon compiler was used to create the final lyout with 0.8um CMOS libraries, using the standard cell approach. The final layout contains about 110, 000 transistors and has a die area of 4.68mm * 4.96mm, and the system has the processing speed of about 50M pixels/sec.

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A study on the Cohousing for Korean Farming Community (한국 농촌형 코하우징 계획에 대한 연구)

  • Hong, Seo-Jung;Jun, Nam-Il
    • Proceeding of Spring/Autumn Annual Conference of KHA
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    • 2004.11a
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    • pp.117-122
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    • 2004
  • This study aimed to suggest a cohousing plan as an alternative housing typology that could be applied to Korean farming community This study contented literature review about cohousing communities, case studies in foreign countries, survey to farmers, and finally schematic design proposal. The respondent farmers wanted tile cohousing community composed of approximately10-20 dwellings with enough common space for working and washing cloths, as well as spaces for children and elderly people. This study hopefully could contribute to improve quality of life in Korean farming communities through development of new housing typology.

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Simulation of HTS RSFQ A/D Converter and its Layout (고온 초전도 RSFQ A/D 변환기의 시물레이션과 설계)

  • 남두우;정구락;강준희
    • Progress in Superconductivity and Cryogenics
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    • v.4 no.1
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    • pp.8-12
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    • 2002
  • Since the high performance analog-to-digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Sng1e Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter.

Develop Test Facility of High Altitude Environment for Kick Motor (Kick Motor용 고공환경 모사 시험 설비 개발)

  • Kim, Sang-Heon;V.A, Bershadskiy;Yu, Byung-Il;Kim, Yong-Wook;Oh, Seung-Hyub;Park, Jeong-Joo
    • 한국전산유체공학회:학술대회논문집
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    • 2008.03b
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    • pp.707-710
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    • 2008
  • The method suggested in this thesis is the safe and economic method when testing rocket engine because ground test facility copies high altitude. We have decided to use the schematic of testing facility based on already known design method and test result, and we have decided the test condition for ground firing test of solid fuel. In addition the pressure of nozzle exit area is 0.1bar, we have designed the testing facility structure to test in this condition. Moreover, we have designed to reduce the accident probability.

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Renovation of Closed School Using Sustainable Method - From Closed School to Artist Studio Complex - (환경친화적인 리노베이션 기법을 적용한 폐교의 재활용 - 폐교를 이용한 복합 예술작업공간 설계 -)

  • Hong, Seung-Shin;Rieh, Sun-Young
    • Journal of the Korean Institute of Educational Facilities
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    • v.9 no.4
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    • pp.95-102
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    • 2002
  • The purpose of this study is to renovate a closed school to a artist studio complex applying sustainable principles and methods. Through the case study, the principle and methods of sustainable renovation is investigated and following strategies are extracted as a frame of renovation. First, atrium space with thermal mass using existing wall is proposed as a public gathering space. Second, light shelves for effective lighting and shading device for protecting and allowing sun light is proposed to renovate existing classroom. Third, double skin system is proposed with reflection pool to activate heating and ventilation for passive solar as well as passive cooling. Finally, simulation programs such as energy-10 and Form-Z is used to confirm the validity of the sustainable design.

BIM-Based Integrated Module for Apartment Environmental Performance and Energy Analysis (BIM기반 공동주택 환경성능 및 에너지 해석 시스템 통합 개발)

  • Suh, Hye-Soo;Lee, Soo-Hyun;Lim, Jae-Sang;Choi, Cheol-Ho
    • Journal of KIBIM
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    • v.4 no.2
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    • pp.1-9
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    • 2014
  • As interest in green building has increased, construction market has evolved through BIM-based architecture also, BIM-based technologies have been developed simultaneously. Due to this aspect, the need of environmental analysis software utilizing BIM data became essential. This study shows that BIM-based integrated module provides objective analysis to proceed quick decision-making for a proposal. In addition to that, this integrated module creates a model through BIM data to analyze and report residential environment and energy consumption such as, daylight, view, ventilation and privacy in order to practically apply the BIM technology from the schematic design.

A Schematic Design Study for Seokwang Elementary School (서광초등학교(初等學校)(가칭(假稱)) 기본계획(基本計劃))

  • Shim, Woo-Gab;Lee, Sang-Ho;Hahn, Yong-Jin
    • Journal of the Korean Institute of Educational Facilities
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    • v.6 no.2
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    • pp.41-54
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    • 1999
  • The objective of this study is to propese a model of elementary school whih reflects the goal of the 7th Reform in Primary & Seconday School Curriculum and attracts prtvate investment through Seokwang elementaey snhool in Seosan. The chief concept of architectural planning on this school is brought out by the analysis of the 7th Reform which pursues a self-regulative and initiative education. Based on this analysis, a proper dimensions of each space are proposed and a new model of elementary school which includes zoning by grade in grouping of the classrooms and outdoor spaces is proposed. As there is no domestic example of the elementary school complex with attraction of private investment in public schools, the matters which must be consideed in planning of this complex are unvectigated, and actual plan for Seokwang elementary school is proposed.

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