• 제목/요약/키워드: Scan period

검색결과 285건 처리시간 0.115초

AC-PDP 어드레스 전압마진 개선을 위한 Slope Overlapped Scan Method 구현 (Improvement Of Address Voltage Margin for Slope Overlapped Scan Method in AC-PDP)

  • 김태균;임병하;이동호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2008년도 학술대회 논문집 정보 및 제어부문
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    • pp.460-461
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    • 2008
  • A new AC-PDP driving method was proposed to reduce the address period. The overlapped scan method can reduce the address period. However, this method has a narrow address voltage margin compared with conventional scan method in this paper, Slope overlapped scan method is presented. The proposed new overlapped scan method allows wider address voltage margin than conventional overlapped scan method.

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스캔주기 유효성 판별에 의한 레이더 식별 (Radar identification by scan period validation)

  • 김관태
    • 융합정보논문지
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    • 제11권11호
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    • pp.17-22
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    • 2021
  • 전자전에서 레이더 신호 해석은 수신한 레이더 신호에서 추출한 신호제원(방향, 주파수, 펄스반복주기, 펄스 폭, 스캔주기)으로 레이더 종류를 식별하는 기술이다. 그러나 신형 레이더, 위협환경이 고도화되면서 레이더 종류를 식별하는 과정에서 레이더 식별 모호성(Ambiguity)가 발생한다. 본 논문에서는 기존 방법의 문제점을 분석하고 새로운 방법을 제안한다. 이 기술은 레이더 스캔 주기의 펄스 도착시간 차이와 스캔주기 판별 최소 수집 개수로 스캔주기 유효성을 판별한다. 실험에 의하여 입력된 신호세기의 RMS((Root Mean Square)와 무관하게 스캔 주기 결과를 도출하는 것을 입증했다.

원형스캔 레이더 식별을 위한 스캔변수 추정기법 (Estimation of scan parameters for identification of the circular scanning radars)

  • 류영진;하현주;김환우
    • 대한전자공학회논문지SP
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    • 제43권6호
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    • pp.105-112
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    • 2006
  • ES 시스템에서 레이더를 식별하는 능력을 향상하기 위해서는 주파수, 펄스반복주기 및 펄스폭 등과 같은 기본 식별변수 이외에 스캔특성을 추정하는 기법이 필요하다. 본 논문에서는 원형스캔 레이더의 스캔특성인 스캔주기와 스캔빔폭을 추정하는 방법을 제안하였다. 제안된 방법은 주기함수의 자기상관관계 특징을 이용하여 스캔주기를 추정한다. 그리고 제안된 스캔주기추정기법과 선형 보간법을 이용하여 스캔빔폭을 추정한다. 제안한 방법의 성능을 입증하기 위해 다양한 모의신호에 대한 실험결과를 제시하였다.

New Driving Method for Fast Addressing of AC-Plasma Display Panel

  • Kim, Gun-Su;Choi, Hoon-Young;Lee, Seok-Hyun;Seo, Jeong-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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    • pp.726-729
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    • 2003
  • A new driving method is proposed to reduce the address period. The scan time of new driving method overlaps with the next scan time during the discharge lag time. Thus, without reducing the address pulse width and the scan pulse width, the new addressing method can reduce the address period. The results show that the scan time of about 100ns ${\sim}$ 300ns can be overlapped without the misfiring,.

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Study on Discharge Characteristics Using $V_t$ Close-Curve Analysis in ac PDPs

  • Cho, Byung-Gwon;Tae, Heung-Sik
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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    • pp.1185-1188
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    • 2007
  • The address discharge characteristics by the various scan-low and common-bias voltages are investigated based on measured address discharge time lags and $V_t$ close-curve analysis. The scan-low voltages are changed under the same voltage difference between the X and Y electrodes during an address period. As the voltage difference between the scan and address electrodes is increased during an address period, the address discharge time lag is shortened but the background luminance is increased. It is found that the improved address discharge characteristics is caused by the effect of the higher external applied voltage during an address period than the accumulated wall charges during a reset period and the high background luminance can be prevented by applying an address-bias voltage during a rising-ramp period and low reset voltage.

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Effect of Scan-bias during Reset Period in a Negative Waveform

  • Park, W.H.;Lee, S.J.;Lee, J.Y.;Kang, J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.728-731
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    • 2009
  • A negative waveform having inverted polarity of conventional waveform during reset and sustain periods was proposed to improve the driving characteristics. In order to control the negative wall-charge distribution, a positive bias on the scan electrode was applied during reset period. Compared to 0 V scan-bias condition, at 8 V scan-bias the formative time lag was improved about 23.95 % and the average time lag was improved about 14.91 %. All experiments were performed with the 42-inch PDP module in XGA resolution.

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급성 신우신염 환아들의 나이에 따른 Dimercaptosuccinic Acid Renal Scan 민감도 (Sensitivity of Dimercaptosuccinic Acid(DMSA) Renal Scan in Children with Acute Pyelonephritis)

  • 장경아;양정아;하태선;박혜원;이준호
    • Childhood Kidney Diseases
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    • 제7권1호
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    • pp.38-43
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    • 2003
  • 목적 : 소아에서는 임상증상만으로 요로감염의 정확한 진단이 어려우므로 DMSA renal scan은 급성 신우신염의 조기 진단과 감별에 중요한 방법이다. 급성 신우신염 환자에서 환자 연령에 따른 DMSA renal scan의 양성률, 신장초음파의 이상여부, 방광요관역류 동반율을 비교해 보고자 하였다. 또 DMSA renal scan과 신장초음파 결과 및 DMSA renal scan과 방광요관역류와의 상관관계를 알아보았다. 방법 : 2001년 3월부터 2002년 9월까지 급성신우신염으로 진단된 67명의 환아를 대상으로 나이에 따라 2세 이하의 소아 57명을 그룹 I으로, 2세 이상의 소아 10명을 그룹 II로 나누었다. 이 환아를 대상으로 DMSA renal scan, VCUG, 신장초음파의 결과를 이용한 후향적 연구를 실시하였다. 결과 : 급성 신우신염 환아에서 DMSA renal scan의 양성률은 나이에 따라서 차이가 없었다. DMSA renal scan과 방광요관역류 등급정도와는 통계학적 의미가 있었으나, 나이에 따른 방광 요관역류와는 통계학적 의미는 없었다. DMSA renal scan과 신장초음파 이상여부와는 의미가 없었다. 나이에 따른 신장초음파 이상여부와도 통계학적 의미는 없었다. 결론 : 현재로서는 DMSA renal scan은 급성 신우신염이 의심되거나, 세균뇨가 있는 환자에게서 감별 진단시 힘들이지 않고, 비교적 경제적 부담이 적은 중요한 검사 방법이다.

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Partial Scan Design based on Levelized Combinational Structure

  • Park, Sung-Ju
    • Journal of Electrical Engineering and information Science
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    • 제2권3호
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    • pp.7-13
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    • 1997
  • To overcome the large hardware overhead attendant in the full scan design, the concept of partial scan design has emerged with the virtue of less area and testability close to full scan. Combinational Structure has been developed to avoid the use of sequential test generator. But the patterns sifted on scan register have to be held for sequential depth period upon the aid of the dedicated HOLD circuit. In this paper, a new levelized structure is introduced aiming to exclude the need of extra HOLD circuit. The time to stimulate each scan latch is uniquely determined on this structure, hence each test pattern can e applied by scan shifting and then pulsing a system clock like the full scan but with much les scan flip-flops. Experimental results show that some sequential circuits are levelized by just scanning self-loop flip-flops.

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Address and Display Period Complex Driving for Expanding Gray Scale

  • Jung, Kwang-Sig;Kim, Gop-Sig;Shin, Seung-Rok;Chae, Su-Yong;Kim, Dae-Hwan;Yoo, Min-Sun;Cho, Yoon-Hyoung
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.647-650
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    • 2005
  • A new driving scheme, Address and Display Period Complex Driving for Expanding Gray Scale(ACE), is proposed by mixing Address Display period Separated(ADS) and Address While Display(AWD). In this method scan lines are divided in blocks driving by AWD and scan lines in block progress sequential high speed addressing. ADS driving get accomplished in low gray level for expanding gray scale. Scan time is reduced and the number of subfields is increased by high speed addressing of ACE. That expands the gray scale and decreases the dynamic false contour. Also, that improves contrast by using ramp reset.

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표시기간 중첩 프라이밍 구동기술에 의한 플라즈마 디스플레이 패널의 고속구동특성 (High-Speed Characteristics of Plasma Display Panel using Priming Overlapping with Display Drive Method)

  • 염정덕
    • 전기학회논문지
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    • 제56권11호
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    • pp.2004-2009
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    • 2007
  • A new high-speed drive method for the plasma display panel is proposed. In this method, the address period is inserted for the rest period of the sustain pulses and the priming pulse is applied on the entire panel at the same time overlapping with the sustain period. The ramp shaped priming pulse can be made with a simple drive circuit in this technology and the stable sustain discharge can be induced even by a narrow scan pulse in help of the space charge generated from the address discharge. From the experiments, it is ascertained that the priming pulse hardly influences the sustain discharge. Moreover, the voltage margin of the sustain discharge is almost constant though that of the address discharge broadens with narrowing the scan pulse width. And, if the time interval between the scan pulse and the sustain pulse is within $6{\mu}s$, the voltage margin of the address and the sustain discharges are unaffected though the applied position of the scan pulse is changed. High-speed driving with the address pulse of $0.7{\mu}s$ width was achieved and the address voltage margin of 20V and the sustain voltage margin of 10V were obtained.