• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.62-62
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• 2015

In this study, we study the effects of CF4 plasma treatment on the characteristics of enhancement mode (E-mode) AlGaN/GaN high electron mobility transistors (HEMTs). The CF4 plasma is generated by inductively coupled plasma reactive ion etching (ICP-RIE) system. The CF4 gas is decomposed into fluorine ions by ICP-RIE and then fluorine ions will effect the AlGaN/GaN interface to inhibit the electron transport of two dimension electron gas (2DEG) and increase channel resistance. The CF4 plasma method neither like the recessed type which have to utilize Cl2/BCl3 to etch semiconductor layer nor ion implantation needed high power to implant ions into semiconductor. Both of techniques will cause semiconductor damage. In the experiment, the CF4 treatment time are 0, 50, 100, 150, 200 and 250 seconds. It was found that the devices treated 100 seconds showed best electric performance. In order to prove fluorine ions existing and CF4 plasma treatment not etch epitaxial layer, the secondary ion mass spectrometer confirmed fluorine ions truly existing in the sample which treatment time 100 seconds. Moreover, transmission electron microscopy showed that the sample treated time 100 seconds did not have etch phenomena. Atomic layer deposition is used to grow Al2O3 with thickness 10, 20, 30 and 40 nm. In electrical measurement, the device that deposited 20-nm-thickness Al2O3 showed excellent current ability, the forward saturation current of 210 mA/mm, transconductance (gm) of 44.1 mS/mm and threshold voltage of 2.28 V, ION/IOFF reach to 108. As IV concerning the breakdown voltage measurement, all kinds of samples can reach to 1450 V.

• 한국진공학회지
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• 제10권1호
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• pp.112-118
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• 2001

본 논문에서는 축 방향으로 자화된 용량결합형 13.65 MHz/40 KHz RF 방전에서 Langmuir Probe, Emissive Probe를 통해 이온 전류 밀도, 전자 온도, 플라즈마 전위의 자장 의존성 및 자기 바이어스 전위를 조사하였다. 자장을 인가함으로서 실험변수 범위 내에서 최대 3배의 이온 전류밀도증가를 얻었고 점화가능한 기체 압력의 최저값을 줄일 수 있었다. 플라즈마가 자화된 경우 공간 전위는 평균적으로 감소하였고 RF 전압의 한주기 동안 시 변동폭이 크게 증가하였다. 플라즈마 전위의 자장 의존성은 Particle-in-Cell Simulation을 수행하여 실험 결과와 비교하였다. 대표적 실험 조건에서 전자 온도는 자장에 따라 약 4 eV에서 5 eV로 약간 증가하는 경향을 보였으나 방전 주파수를 40 KHz로 줄인 경우 1.8 eV에서 0.8 eV로 감소하였다. 실험 장치의 응용 예로서 플루오로 카본 가스에 의한 식각실험이 수행되었다. 자화 플라즈마의 산화막 식각속도 증가를 확인함으로서 축방향 자장이 실제 공정에 긍정정인 영향을 미침을 확인 할 수 있었다.

• 한국진공학회지
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• 제22권6호
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• pp.335-340
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• 2013

본 논문은 InP 식각정지층을 갖는 MHEMT 소자의 항복전압을 증가시키기 위한 시뮬레이션 설계 논문이다. MHEMT 소자의 게이트 리세스 구조 및 채널 구조를 변경하여 시뮬레이션을 수행하였고 비교 분석하였다. MHEMT 소자의 드레인 측만을 완전히 제거한 비대칭 게이트 리세스 구조인 경우 $I_{dss}$ 전류가 90 mA에서 60 mA로 줄어들지만 항복 전압은 2 V에서 4 V로 증가함을 확인하였다. 이는 $Si_3N_4$ 보호층과 InAlAs 장벽층 사이의 계면에서 형성되는 전자-포획 음의 고정전하로 인해 채널층에서의 전자 공핍이 심화되어 나타나는 현상으로 이는 채널층의 전류를 감소시켜 충돌이온화를 적게 형성시켜 항복전압을 증가시킨다. 또한, 동일한 구조의 비대칭 게이트 리세스 구조에서 채널층을 InGaAs/InP 복합 채널로 바꾸어 설계한 구조에서는 항복전압이 5 V로 증가하였다. 이는 높은 드레인 전압에서 InP 층의 적은 충돌이온화와 이동도로 인해 전류가 더 감소했기 때문이다.

• International Journal of Aeronautical and Space Sciences
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• 제17권4호
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• pp.501-517
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• 2016

Synchronized switch damping (SSD) is a structural vibration control technique in which a piezoelectric patch attached to or embedded into the structure is connected to or disconnected from the shunt circuit in order to dissipate the vibration energy of the host structure. The switching process is performed by a digital signal processor (DSP) which detects the displacement extrema and generates a command to operate the switch in synchronous with the structure motion. Recently, autonomous SSD techniques have emerged in which the work of DSP is taken up by a low pass filter, thus making the whole system autonomous or self-powered. The control performance of the previous autonomous SSD techniques heavily relied on the electrical quality factor of the shunt circuit which limited their damping performance. Thus in order to reduce the influence of the electrical quality factor on the damping performance, a new autonomous SSD technique is proposed in this paper in which a negative capacitor is used along with the inductor in the shunt circuit. Only a negative capacitor could also be used instead of inductor but it caused saturation of negative capacitor in the absence of an inductor due to high current generated during the switching process. The presence of inductor in the shunt circuit of negative capacitor limits the amount of current supplied by the negative capacitance, thus improving the damping performance. In order to judge the control performance of proposed autonomous SSDNCI, a comparison is made between the autonomous SSDI, autonomous SSDNC and autonomous SSDNCI techniques for the control of an aluminum cantilever beam subjected to both single mode and multimode excitation. A value of negative capacitance slightly greater than the piezoelectric patch capacitance gave the optimum damping results. Experiment results confirmed the effectiveness of the proposed autonomous SSDNCI technique as compared to the previous techniques. Some limitations and drawbacks of the proposed technique are also discussed.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제51권3호
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• pp.134-140
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• 2002

Deep submicron NMOSFETs with elevated source/drain can be fabricated using self-aligned selective epitaxial growth(SEG) of silicon for enhanced device characteristics with shallow junction compared to conventional MOSFETs. Shallow junctions, especially with the heartily-doped S/D residing in the elevated layer, give hotter immunity to Yt roll off, drain-induced-barrier-lowering (DIBL), subthreshold swing (SS), punch-through, and hot carrier effects. In this paper, the characteristics of both deep submicron elevated source/drain NMOSFETs and conventional NMOSFETs were investigated by using TSUPREM-4 and MEDICI simulators, and then the results were compared. It was observed from the simulation results that deep submicron elevated S/D NMOSFETs having shallower junction depth resulted in reduced short channel effects, such as DIBL, SS, and hot carrier effects than conventional NMOSFETs. The saturation current, Idsat, of the elevated S/D NMOSFETs was higher than conventional NMOSFETs with identical device dimensions due to smaller sheet resistance in source/drain regions. However, the gate-to-drain capacitance increased in the elevated S/D MOSFETs compared with the conventional NMOSFETs because of increasing overlap area. Therefore, it is concluded that elevated S/D MOSFETs may result in better device characteristics including current drivability than conventional NMOSFETs, but there exists trade-off between device characteristics and fate-to-drain capacitance.

• 대한전자공학회논문지
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• 제26권5호
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• pp.46-51
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• 1989

DC 스트레스에 의해 노쇠화된 짧은 채널 LDD NMOSFET에서 문턱전압과 subthreshold 전류곡선의 변화를 관측하여 hot-carrier 주입에 의한 노쇠화를 연구하였다. 포화영역에서 정의된 문턱전압의 변화 ${Delta}V_{tex}$를 trapped charge에 기인한 변화성분 ${Delta}V_{ot}$와 midgap에서 문턱전압 영역에 생성된 계면상태에 의한 변화성분${Delta}V_{it}$로 분리하였다. 게이트 전압이 드레인 전압보다 큰 positive oxid field ($V_g>V_d$) 조건에서는 전자들이 게이트 산화막으로 주입되어 문턱전압이 증가되었으나 subthreshold swing은 크게 변화하지 않고 subthreshold 전류곡선만 높은 게이트 전압으로 평행 이동하였다. 게이트 전압이 드레인 전압보다 낮은 negative oxide field ($V_g) 조건에서는 hole이 주입되고 포획된 결과를 보였으나 포획된 positive charge수 보다 더 많은 계면상태가 동시에 생성되어 문턱전압과 subth-reshold swing이 증가되었다.

• 대한전자공학회논문지SD
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• 제39권5호
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• pp.1-7
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• 2002

Deep sub-micron bulk CMOS circuits require gate electrode materials such as metal silicide and titanium silicide for gate oxides. Many authors have conducted research to improve the quality of the sub-micron gate oxide. However, few have reported on the electrical quality and reliability of an ultra-thin gate. In this paper, we will recommend a novel shallow trench isolation structure and a two-step TiS $i_2$ formation process to improve the corner metal oxide semiconductor field-effect transistor (MOSFET) for sub-0.1${\mu}{\textrm}{m}$ VLSI devices. Differently from using normal LOCOS technology, deep sub-micron CMOS devices using the novel shallow trench isolation (STI) technology have unique "inverse narrow-channel effects" when the channel width of the device is scaled down. The titanium silicide process has problems because fluorine contamination caused by the gate sidewall etching inhibits the silicide reaction and accelerates agglomeration. To resolve these Problems, we developed a novel two-step deposited silicide process. The key point of this process is the deposition and subsequent removal of titanium before the titanium silicide process. It was found by using focused ion beam transmission electron microscopy that the STI structure improved the narrow channel effect and reduced the junction leakage current and threshold voltage at the edge of the channel. In terms of transistor characteristics, we also obtained a low gate voltage variation and a low trap density, saturation current, some more to be large transconductance at the channel for sub-0.1${\mu}{\textrm}{m}$ VLSI devices.

• Journal of the korean society of oceanography
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• 제37권1호
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• pp.27-34
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• 2002

We measured the alkenone concentration of bulk sediments from a piston core collected from the Ulleung Basin in the East Sea in order to reconstruct past sea surface temperatures (SST). Sediment ages are well constrained by AMS $^{14}C$ dates of the planktonic foraminifera Globigerina bulloides. Coretop alkenone SST calibration with modern surface temperatures and sediment trap dat (Hong et al., 1996) indicate that the SST estimated from alkenones most likely represent the temperatures of late fall. Downcore variations in the alkenone saturation index indicate that between 19 and 15 kyr BP the surface waters were about $3^{\circ}C$ warmer than today. Between 15 and 11 kyr BP, the temperatures were about $3^{\circ}C$ lower than today. A rapid SST increase of about $3^{\circ}C$ occurred at approximately 10 kyr BP. After considering the factors which might influence the SST reconstruction from the $U^{k'}_{37}$ values, we conclude that the alkenone temperature estimates are reliable. The reason for glacial warming in the East Sea is not clear, although there is a possibility that it could be caused by shift in the season of maximum alkenone production from summer during the last glaciation to late fall during the Holocene. Cooling between 15 and 11 kyr BP may be due to inflow of cold water into the East Sea such as via the Oyashio Current or ice-melt water. Warming at the early Holocene could be due to inflow of the Tsushima Current into the East Sea through the Korea Strait.

• 대한자기공명의과학회:학술대회논문집
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• 대한자기공명의과학회 2003년도 제8차 학술대회 초록집
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• pp.97-97
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• 2003

Contrast-enhanced MR angiography (CE-MRA) gradually occupies its position as a primary evaluation tool forsteno-occlusive disease of supra-aortic cervical arteries. It has several advantages over time-of-flight (TOF) technique such as shorter imaging time, less saturation effect, and less flow- and motion-related artifacts. Diverse methods of k-space sampling, imaging sequences, and strategies for image acquisitiontiming have been introduced since its early clinical application. Especially, methods of k-space sampling and image acquisition timing are very important to achieve maximal arterial enhancement and suppress venous signal while maintaining large scan coverage and high spatial resolution. In addition, regardless of several advantages over TOF technique, it still has a tendency to overestimate the degree of stenosis in patients with carotid or vertebralartery disease. In this exhibit, we will overview the current techniques of CE-MRA with special attention to methods of k-space sampling and image acquisition timing. We will also discuss diagnostic accuracy of CE-MRA in patients with supra-aortic cervical artery stenosis and artifacts frequently misinterpreted as steno-occlusive lesion on CE-MRA.

• Journal of Electrochemical Science and Technology
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• 제6권2호
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• pp.65-74
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• 2015

This work examines the characterization and corrosion behaviour of laser alloyed UNSG10150 steel with three different premixed composition Zn-Sn binary powders using a 4.4 kW continuous wave (CW) Rofin Sinar Nd:YAG laser processing system. The steel alloyed samples were cut to corrosion coupons, immersed in sulphuric acid (0.5 M H₂SO₄) solution at 30℃ using electrochemical technique and investigated for its corrosion behaviour. The morphologies and microstructures of the developed coated and uncoated samples were characterized by Optic Nikon Optical microscope (OPM) and scanning electron microscope (SEM/EDS). Moreover, X-ray diffractometer (XRD) was used to identify the phases present. An enhancement of 2.7-times the hardness of the steel substrate was achieved in sample A₁ which may be attributed to the fine microstructure, dislocations and the high degree of saturation of solid solution brought by the high scanning speed. At scanning speed of 0.8 m/min, sample A₁ exhibited the highest polarization resistance R_p (1081678 Ωcm² ), lowest corrosion current density i_corr (4.81×10⁻⁸A/cm² ), and lowest corrosion rate Cr (0.0005 mm/year) in 0.5 M H₂SO₄. The polarization resistance R_p (1081678 Ωcm² ) is 67,813-times the polarization of the UNSG10150 substrate and 99.9972% reduction in the corrosion rate.