• The Journal of the Korea institute of electronic communication sciences
• /
• v.11 no.5
• /
• pp.511-522
• /
• 2016

Breaking down the boundaries between recent study has emerged as a key issue of convergence education to create new knowledge. The core of IT Convergence Education is being made through educational SW, SW purpose of education has been focused on improving the CT(: Computational Thinking). The purpose of this paper is to design a CT teaching model for activating IT Convergence Education. In this study, we designed a CT Curriculum focusing on algorithm and program for the purpose of enhancing non-majors learner's CT ability and software adaptability and being utilized in the majors. It is expected to be utilized to design a CT teaching methods and curriculum in University.

• CDE review
• /
• v.22 no.2
• /
• pp.2-5
• /
• 2016

• Ingenium
• /
• v.23 no.2
• /
• pp.26-33
• /
• 2016

• Proceeding of EDISON Challenge
• /
• 2015.03a
• /
• pp.530-531
• /
• 2015

• CDE review
• /
• v.21 no.2
• /
• pp.23-26
• /
• 2015

• 시스템엔지니어링워크숍
• /
• s.6
• /
• pp.157-162
• /
• 2005

• Proceeding of EDISON Challenge
• /
• 2016.03a
• /
• pp.510-512
• /
• 2016

• Journal of Practical Engineering Education
• /
• v.11 no.2
• /
• pp.167-174
• /
• 2019

In the case of Java programming education for non-major undergraduates, there are no examples of applying the physical computing education method. The advantage of physical computing education is that you can directly check the SW processing output result according to the input value of digital and analog sensor, so that you can quickly correct programming errors and improve learner's learning interest and satisfaction. In this paper, we use the microbits to combine physical computing education with basic Java programming education. In addition, according to the computational thinking process, we proposed an educational method for creating Java programs using microbits. Through block programming to control the microbits, we designed an algorithm and applied a training method to convert it into a Java program. In addition, the results of students' evaluations were analyzed in the course applying the education method, and the effectiveness of the education method using the microbit was analyzed.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.25 no.11
• /
• pp.1135-1141
• /
• 2014

Performing wideband DDC while quantizing signal over a wide dynamic range and high speed sampling rate have primarily been implemented in a hardware such as, FPGA or ASIC because of time-consuming job. Real-time wideband DDC SW, even though signal environment changes, adapt to signal environment flexibly and can be reused. In addition, it has a lower price than the hardware implementation. In this paper, we study the system design that can be stored in real time designing a high-speed parallel processing architecture for SW-based wideband DDC. Finally, applying a Ping-Pong Buffering mechanism for receiving a signal in real time and CUDA for a high-speed signal processing, we verify wideband DDC design procedure that meets the signal processing.

• Journal of KIISE:Computing Practices and Letters
• /
• v.8 no.3
• /
• pp.261-267
• /
• 2002

In SOC(System On a Chip) designs, reducing time and cast for design verification is the most critical to improve the design productivity. this is mainly because the designs require co-verifying HW together with SW, which results in the increase of verification complexity drastically. In this paper, to cope with the verification crisis in SOC designs, we propose a new verification methodology, so called integrated co-verification, which lightly combine both co-simulation and co-emulation in unified and seamless way. We have applied our integrated co-verification to ARM/AMBA platform-based co-verification environment with a commercial co-verification tool, Seamless CVE, and a physical prototyping board. The experiments has shown clear advantage of the proposed technique over conventional ones.