• Food Engineering Progress
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• v.15 no.4
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• pp.297-304
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• 2011

Ramen flour formulation was optimized by applying a mixture experimental design. In the optimization, the overall palatability (OP) of cooked ramen and the rheological properties of selected dough were maximized or minimized. Blended ratios of the ingredients such as Dark Northern Spring (DNS), Hard Red Winter (HRW), and Soft White (SW) were designed on a simplex-lattice. Dough rheological properties were measured by Rapid Visco Analyser (RVA), Farinograph, and Extensograph, and the overall palatability by sensory evaluation. Several principal dough rheological properties such as RVA peak viscosity (PV), Farinograph development time (DT), and Extensograph resistance/extensibility after 45 min (R/E 45 min) were selected to influence the overall palatability by canonical correlation analysis (CCA). Goals of the optimization were given as OP maximized, PV maximized, DT minimized, and R/E at 45 min maximized. The optimization results were found to be DNS 33.3%, HRW 33.3%, and SW 33.3% with OP, 5.825; PV, 587.9 cP; DT, 3.1 min; R/E at 45 min, 2.339 BU/mm.

• ETRI Journal
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• v.37 no.5
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• pp.1001-1011
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• 2015

Since just-in-time (JIT) has considerable overhead to detect hot spots and compile them at runtime, using sophisticated optimization techniques for embedded devices means that any resulting performance improvements will be limited. In this paper, we introduce a novel static Dalvik bytecode optimization framework, as a complementary compilation of the Dalvik virtual machine, to improve the performance of Android applications. Our system generates optimized Dalvik bytecodes by using Low Level Virtual Machine (LLVM). A major obstacle in using LLVM for optimizing Dalvik bytecodes is determining how to handle the high-level language features of the Dalvik bytecode in LLVM IR and how to optimize LLVM IR conforming to the language information of the Dalvik bytecode. To this end, we annotate the high-level language features of Dalvik bytecode to LLVM IR and successfully optimize Dalvik bytecodes through instruction selection processes. Our experimental results show that our system with JIT improves the performance of Android applications by up to 6.08 times, and surpasses JIT by up to 4.34 times.

• The Korean Journal of Food And Nutrition
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• v.14 no.5
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• pp.423-429
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• 2001

Process optimization of milling and puffing condition of the typical varieties of wheat such as HRS, ASW, and SW were studied. Distibution of optimal milling size of 8 mesh-on was more than 90% after milling of three wheats. That of HRS was the highest, 78%, and that of SW and ASW were pretty high, above 75%. Moisture content of three wheats was between 10∼12%, and protein content which are important for texture profile and puffing was 12.68%, 13.59%, and 11.82% for SW, HRS, and ASW, respectively. Puffing was optimal of 7 kg/$\textrm{cm}^2$ heating pressure for SW, and 5 kg/$\textrm{cm}^2$ lot HRS and ASW when the puffing process was pursued at 14.5 ∼15.0 kg/$\textrm{cm}^2$ steam pressure. Moisture content decreased from 11∼l3% to 5.6∼6.0% after puffing. Bulk density of SW, HRS, and ASW was 0.0441, 0.0523, and 0.0460, respectively. Size distribution of HRS was 82.4% after Puffing. Press strength of HRS was high, 51.0%, and texture of HRS was crispy.

• Proceedings of the Korean Information Science Society Conference
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• 2011.06b
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• pp.470-473
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• 2011

본 논문에서는 첫째, 기존 HW/SW partitioning문제의 접근 방식 모델에서 다루지 못하였던 시간 의존적인 개발 기간, 판매 가격, 판매량, time-to-market 등의 요소들을 반영하는 multi-objective 최적화문제 형태의 새로운 "Sequential HW/SW Partitioning Optimization Framework(SPOF)"를 제시하고 둘째, 그 모델로 형식화된 NP-hard 문제를 일반적으로 해결하기위한 해법으로 SPOF의 형태에 맞게끔 변형한 chromosome과 genetic operation을 사용하는 메타휴리스틱 "Fast and Elitist Multi-objective Genetic Algorithm(NSGA-II)"을 제시한다. 실험을 통하여 NSGA-II의 최적 솔루션에의 수렴성을 보인다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.7
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• pp.1480-1483
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• 2009

In this paper, the hardware(HW) and software(SW) co-design methodology of H.264/AVC decoder using ARM-Excalibur is proposed. The SoC consists of embedded processor, memory, peripheral device and logic circuits. Recently, the co-design method which designs simultaneously HW and SW part is a new paradigm in SoC design. Because the optimization for partitioning the SoC system is very difficult, the verification must be performed earlier in design flow. We designed the H.264 and AVC Decoder using co-design method. It is shown that, for the proposed co-design method, the performance improvements can be obtained.

• ETRI Journal
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• v.29 no.6
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• pp.736-744
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• 2007

We propose a fast macroblock (MB) mode prediction and decision algorithm based on temporal correlation for P-slices in the H.264/AVC video standard. There are eight block types for temporal decorrelation, including SKIP mode based on rate-distortion (RD) optimization. This scheme gives rise to exhaustive computations (search) in the coding procedure. To overcome this problem, a thresholding method for fast inter mode decision using a MB tracking scheme to find the most correlated block and RD cost of the correlated block is suggested for early stop of the inter mode determination. We propose a two-step inter mode candidate selection method using statistical analysis. In the first step, a mode is selected based on the mode information of the co-located MB from the previous frame. Then, an adaptive thresholding scheme is applied using the RD cost of the most correlated MB. Secondly, additional candidate modes are considered to determine the best mode of the initial candidate modes that does not satisfy the designed thresholding rule. Comparative analysis shows that a speed-up factor of up to 70.59% is obtained when compared with the full mode search method with a negligible bit increment and a minimal loss of image quality.

• Korean Journal of Food Science and Technology
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• v.25 no.6
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• pp.787-793
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• 1993

A mold producing large amounts of lipid were isolated from leaves, arable soils, rice straw, cow feces, compost heaps and fermented soybeans. Among various sources, the microbes from leaves produced the large amount lipids, which were identified as Aspergillus sydowi SW 4-1. This study was focused mainly on the optimization of cultural conditions for lipid production by A. sydowi SW 4-1 and the characterization of the produced lipids. A. sydowi SW 4-1 was cultivated in a medium containing 27% sucrose for 17 days at $27^{\circ}C$. Biomass was 4.99g/100ml of the cultural medium and lipid content was 41.4% on a dry biomass basis. The major fatty acids were palmitic acid, stearic acid, oleic acid, and linoleic acid.

• ETRI Journal
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• v.39 no.2
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• pp.151-162
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• 2017

With the remarkable growth in rich media in recent years, people are increasingly exposed to visual information from the environment. Visual information continues to play a vital role in rich media because people's real interests lie in dynamic information. This paper proposes a novel discrete dynamic swarm optimization (DDSO) algorithm for video object tracking using invariant features. The proposed approach is designed to track objects more robustly than other traditional algorithms in terms of illumination changes, background noise, and occlusions. DDSO is integrated with a matching procedure to eliminate inappropriate feature points geographically. The proposed novel fitness function can aid in excluding the influence of some noisy mismatched feature points. The test results showed that our approach can overcome changes in illumination, background noise, and occlusions more effectively than other traditional methods, including color-tracking and invariant feature-tracking methods.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.8 no.6
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• pp.2070-2086
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• 2014

As a kind of personal lifelog data, activity data have been considered as one of the most compelling information to understand the user's habits and to calibrate diagnoses. In this paper, we proposed a robust algorithm to sampling rates for human activity recognition, which identifies a user's activity using accelerations from a triaxial accelerometer in a smartphone. Although a high sampling rate is required for high accuracy, it is not desirable for actual smartphone usage, battery consumption, or storage occupancy. Activity recognitions with well-known algorithms, including MLP, C4.5, or SVM, suffer from a loss of accuracy when a sampling rate of accelerometers decreases. Thus, we start from particle swarm optimization (PSO), which has relatively better tolerance to declines in sampling rates, and we propose PSO with an adaptive boundary correction (ABC) approach. PSO with ABC is tolerant of various sampling rate in that it identifies all data by adjusting the classification boundaries of each activity. The experimental results show that PSO with ABC has better tolerance to changes of sampling rates of an accelerometer than PSO without ABC and other methods. In particular, PSO with ABC is 6%, 25%, and 35% better than PSO without ABC for sitting, standing, and walking, respectively, at a sampling period of 32 seconds. PSO with ABC is the only algorithm that guarantees at least 80% accuracy for every activity at a sampling period of smaller than or equal to 8 seconds.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.4
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• pp.593-605
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• 2014

In this paper, we propose the efficient HW/SW co-design method of light-weight cryptography such as HIGHT, PRESENT and PRINTcipher using GEZEL. At first the symmetric cryptographic algorithms were designed using the GEZEL language which is efficiently used for HW/SW co-design. And for the improvement of performance the HW optimization theory such as unfolding, retiming and so forth were adapted to the cryptographic HW module conducted by FSMD. Also, the operation modes of those algorithms were implemented using C language in 8051 microprocessor, it can be compatible to various platforms. For providing reliable communication between HW/SW and preventing the time delay the improved handshake protocol was chosen for enhancing the performance of the connection between HW/SW. The improved protocol can process the communication-core and cryptography-core on the HW in parallel so that the messages can be transmitted to SW after HW operation and received from SW during encryption operation.