• Title/Summary/Keyword: SSIMT

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Fabrication and characteristics of SSIMT using a CMOS Process (CMOS공정에 의한 SSIMT의 제작 및 특성)

  • 송윤귀;임재환;정귀상;김남호;류지구
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.07a
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    • pp.168-171
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    • 2002
  • A SSIMT(Suppressed Sidewall Injection Magnetotransistor) sensor with high linearity is presented in this thesis. The prototype is fabricated by using the Hynix 0.6$\mu\textrm{m}$ P-substrate twin-well double poly three-metal CMOS Process. The fabricated SSIMT shows that variation of the collector current is extremely linear by varing the magnetic induction from -200mT to 200mT at I$\_$B/=500${\mu}$A, V$\_$CE/=2V and V$\_$SUB/=5V. The relative sensitivity is up to 120%/T. At B = 0, magnetic offset is about 79mT, there relative sensitivity is 30.5%/T. The nonlinearity of the fabricated SSIMT is measured about 1.4%.

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Characteristics of the Suppressed Sidewall Injection Magnetotransistor using a CMOS Process (CMOS 공정에 의한 Suppressed Sidewall Injection Magnetotransistor의 특성)

  • Song, Youn-Gui;Choi, Young-Shig;Kim, Nam-Ho;Ryu, Ji-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.10
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    • pp.1029-1033
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    • 2004
  • In this paper, we propose a new Suppressed Sidewall Injection Magnetotransistor(SSIMT) architecture, which allows to overcome the restriction of the standard CMOS technology and achieve high linearity. The proposed SSIMT is designed based on the Hynix 0.6 um standard CMOS technology. The fabricated SSIMT has been experimentally verified. The SSIMT shows that the change of collector current is extremely linear as a function of the magnetic induction at $I_{B}$ =500$\mu$A, $V_{CE}$ =2V and VSE =5 V. The relative sensitivity is up to 120 %/T. The magnetic conversion offset is about 79 mT with 30.5 %/T relative sensitivity. The nonlinearity of the fabricated SSIMT is measured about 1.4 %.%.

Characteristics of the 2-D SSIMT using a CMOS Process (CMOS 공정을 이용한 2차원 SSIMT의 특성)

  • Song, Youn-Gui;Ryu, Ji-Goo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.8
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    • pp.697-700
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    • 2007
  • A novel 2-Dimensional Suppressed Sidewall Injection Magnetotransistor (SSIMT) with high linearity has been fabricated on the standard CMOS technology and experimentally verified. The novel 2-Dimensional SSIMT overcomes the restriction of the standard CMOS technology. Experimental results of the fabricated 2-Dimensional SSIMT show that the variation of each collector output currents are extremely linear as a function of magnetic field from -200mT to 200mT at $I_B = 1 mA,\;V_{CE} = 5 V\;and\;V_{SE} = 5 V$. The relative sensitivity shows up to 13 %/T. The measured nonlinearity of the fabricated device is about 0.9%.

Fabrication and characteristics of 2-Dimensional SSIMT using a CMOS Process (CMOS 공정에 의한 2차원 SSIMT의 제작 및 특성)

  • Song, Youn-Gui;Lee, Ji-Hyun;Choi, Young-Shig;Kim, Nam-Ho;Ryu, Ji-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.443-446
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    • 2003
  • A 2-Dimensional SSIMT(Suppressed Sidewall Injection Magnetotransistor) sensor with high linearity is presented in this paper. The prototype is fabricated by using the Hynix $0.6{\mu}m$ CMOS Process. The fabricated SSIMT shows that the variation of each collectors current are extremely linear by varing the magnetic induction from -200mT to 200mT at $I_B\;:\;1000{\mu}A,\;V_{CE}\;=\;5V\;and\;V_{SUB}\;=\;5V$. The relative sensitivity is up to 13%/T. At B = 0, magnetic offset is about 40mT, there relative sensitivity is 4.72%/T. The nonlinearity of the fabricated 2-D SSIMT is measured about 1.2%.

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