• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.943-946
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• 2003

This paper proposes new SPICE Macro-Model of MTJ(Magnetic Tunnel Junction). This Macro-Model has five I/O terminals, reproduces MR characteristics including hysteresis and behaves correctly to time varying input signals. Furthermore, this Model can be easily modified to various MTJs with different characteristics by simply varying internal parameters.

• Proceedings of the KIEE Conference
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• 1991.11a
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• pp.249-252
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• 1991

I-V characteristics of LIGBT is studied by SPICE simulation which includes device parameters and process parameters. Analysis and modeling of ON-resistance are discussed in this paper. Compare with experimental values, SPICE simulation and modeling results show that our simulation is valid for LIGBT.

• Proceedings of the KIEE Conference
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• 2005.07d
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• pp.3019-3021
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• 2005

In this paper we suggest a novel temperature detection method utilized in direct over-temperature protection circuit modeling. The suggested model detects temperature variation using Rds(on) characteristics of MOSFET, while the conventional methods are using extra devices such as a temperature sensor or an over-temperature detection transistor. The temperature-dependant MOSFET model is implemented using Spice ABM(Spice Analog Behavior Model). The direct over-temperature protection circuit was designed including it. We verified effectiveness of the temperature dependant Rds(on) model characteristics and performance of the direct over-temperature protection circuit on PSpice simulation

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.1
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• pp.1-7
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• 1999

In this paper, we use the FDTD method to analyze crosstalk characteristics for high speed pulse signal on MTL(Multi-Transmission Line) in time domain. The FDTD results are compared to the results of SPICE modeling method and the experimental result. The FDTD method has higher accuracy of results than other methods, and it can analyze transmission characteristics of MTL regard to loss of conductor. We analyze crosstalk characteristics for pulse on MTL for lossless and loss case.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.173-178
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• 2012

Using accurate MOSFET substrate parameters obtained by a RF direct extraction method, it is demonstrated that a BSIM4 model with only substrate resistances is not physically valid to apply in the wide range of gate length because of scaling inaccuracy. In order to remove the unphysical problem of the BSIM4, a modified BSIM4 model with additional dielectric substrate capacitance is used and its physical validity is verified by observing excellent gate length scalability.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.5
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• pp.358-365
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• 2016

We propose a novel application of random forest, a machine learning-based general classification algorithm, to analyze the influence of design attributes on the silicon-to-SPICE (S2S) gap. To improve modeling accuracy, we introduce magnification of learning data as well as randomization for the counting of design attributes to be used for each tree in the forest. From the automatically generated decision trees, we can extract the so-called importance and impact indices, which identify the most significant design attributes determining the S2S gap. We apply the proposed method to actual silicon data, and observe that the identified design attributes show a clear trend in the S2S gap. We finally unveil 10nm key fin-shaped field effect transistor (FinFET) structures that result in a large S2S gap using the measurement data from 10nm test vehicles specialized for model-hardware correlation.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.5
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• pp.341-346
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• 2013

Threshold voltage shift caused by trapping and release of charge carriers in a thin-film transistor (TFT) is implemented in AIM-SPICE tool. Turning on and off voltages are alternatively applied to a TFT to extract charge trapping and releasing process. Each process is divided into sequentially ordered processes, which are numerically modeled and implemented in a computer language. The results show a good agreement with the experimental data, which are modeled. Since the proposed method is independent of TFT's behavior models implemented in SPICE tools, it can be easily added to them.

• Proceedings of the KIPE Conference
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• 2007.07a
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• pp.503-505
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• 2007

효율적인 LCD Backlight 구동 시스템 설계를 위해서는 CCFL에 대한 전기적 특성 파악이 중요하지만 디스플레이의 대형화에 따라 LCD Backlight 램프는 길어지고 비선형 특성으로 인해 특성 표현이 곤란하여 회로 설계시 간략화된 등가 모델을 사용하게 되어 실제 인버터 제작과정에서 많은 시행착오를 거치게 한다. 회로 설계시 수식모델 적용을 위한 CCFL의 모델이 필요하며, 이러한 모델은 인버터를 효율적으로 설계할 수 있게 하므로서 설계에 필요한 시간과 자원 절감을 가능하게 한다. 본 논문에서는 42인치 LCD 구동인버터 설계에 필요한 CCFL의 수식 모델링을 IsSpice를 이용하여 구현하였으며, 회로 시뮬레이션과 실험을 통하여 모델의 타당성을 검증하였다.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.715-717
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• 1993

Resonant Inverter is analyzed by means of widely available software such a SPICE. In this paper, macro-model of RDCLI is used which is based on converter switch function rather than actual circuit configuration. Computer memory and nm time are greatly reduced compared to micro-model by using macro-model. System overall performance including control strategy and harmonic characteristics can be analyzed easily. This method is suited for stead state analysis and transition analysis at system level.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.5
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• pp.54-61
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• 1999

We suggested a macro medel for MOS transistors, which incorporates the distributed substrate resistance by using a method which utilizes external diodes on SPICE MOS model. By fitting the simulated s-parameters to the measures ones, we obtained a model set for the W=200TEX>$\mu\textrm{m}$ and L=0.8TEX>$\mu\textrm{m}$ NMOS transistor, and also analyzed the effects of distributed substrate resistance in the RF range. By comparing the physical parameters calculated from simulated s-parameters such as ac resistances and capacitances with the measured ones, we confirmed the validity of the simulation results. For the frequencies below 10GHz, it seems appropriated to use a simple macro model which utilizes the existing SPICE MOS model with junction diodes, after including one lumped resistor each for gate and substrate nodes.